"Trust, but verify."

Kim Hazelwood
Assistant Professor of Computer Science

Department of Computer Science
School of Engineering and Applied Science
University of Virginia
151 Engineer's Way, P.O. Box 400740
Charlottesville, Virginia 22904-4740

Phone: (434) 982-2228
Fax: (434) 982-2214
Email: hazelwood@virginia.edu
Office: 209 Olsson Hall, UVa

Home page of Kim Hazelwood

Areas of Interest

Virtualization, optimizing compilers, computer architecture, binary modification, embedded systems.

Biographical Sketch

im Hazelwood received her Ph.D. in Computer Science from Harvard University in 2004. She joined the University of Virginia in 2005 as an Assistant Professor of Computer Science, after a post-doctoral position at Intel. She is the recipient of FEST Distinguished Young Investigator Award, a Harvard DEAS Fellowship, an Intel Fellowship, an NSCU Dean's Fellowship, an NSF Sure Fellowship, and a Best Student Presentation Award at the 2004 CGO Conference. She served on the program committee of the International Symposium on Programming Language Design and Implementation (PLDI), the International Symposium on Code Generation and Optimization (CGO), the International Conference on Virtual Execution Environments (VEE), the International Symposium on Parallel Architectures and Compilation Techniques (PACT), and the Workshop on Binary Instrumentation and Applications (WBIA). She also served on the organizing committees of the International Symposium on Computer Architecture (ISCA), and the International Symposium on Microarchitecture (Micro). She held research positions at IBM, Hewlett-Packard, and Intel, and has authored or co-authored over twenty refereed articles.

Research

azelwood's research interests include all aspects of optimizing compilers and computer architecture. She focuses on infrastructures for and applications of dynamic binary modification. Her earlier work investigated the problem of caching and managing modified code. She has also explored several program optimizations that can be applied at run time. More recently, she has been interested in applying dynamic binary optimizers to the areas of low-power computing, reliability, and embedded systems. She collaborates on the Pin Project and leads the Tortola Project.

Selected Publications

SuperPin: Parallelizing Dynamic Instrumentation for Real-Time Performance Steven Wallace and Kim Hazelwood, Proceedings of the 5th Annual IEEE/ACM International Symposium on Code Generation and Optimization (CGO-5). Palo Alto, California, USA. March 2007, pages 209-217.

Improving Region Selection in Dynamic Optimization Systems David Hiniker, Kim Hazelwood and Michael D. Smith, Proceedings of the International Symposium on Microarchitecture (MICRO-38), Barcelona, Spain. November 2005, pages 141-154.

Pin: Building Customized Program Analysis Tools with Dynamic Instrumentation Chi-Keung Luk, Robert Cohn, Robert Muth, Harish Patil, Artur Klauser, Geoff Lowney, Steven Wallace, Vijay Janapa Reddi and Kim Hazelwood, Proceedings of the ACM/SIGPLAN International Symposium on Programming Language Design and Implementation (PLDI), Chicago, Illinois, USA. June 2005, pages 191-200.

Eliminating Voltage Emergencies via Microarchitectural Voltage Control Feedback and Dynamic Optimization Kim Hazelwood and David Brooks, Proceedings of the ACM International Symposium on Low-Power Electronics and Design (ISLPED), Newport Beach, California, USA. August 2004, pages 326-331.

Exploring Code Cache Eviction Granularities in Dynamic Optimization Systems Kim Hazelwood and James E. Smith, Proceedings of the 2nd Annual IEEE/ACM International Symposium on Code Generation and Optimization (CGO-2). Palo Alto, California, USA. March 2004, pages 89-99. (Awarded Best Presentation)

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