Thursday, April 16, 2009
Karthik Sankaranarayanan
Chair: Jack W. Davidson
Advisor: Kevin Skadron; Mircea R. Stan (Co-Advisor); John Lach and James P. Cohoon
OLSSON 236D, 08:00:00
A Ph.D. Defense
Thermal Modeling and Management of Microprocessors
ABSTRACT
The exponential growth of microprocessor power density due to non-ideal technology scaling has elevated temperature to become a first-class design constraint in microprocessors. This dissertation describes work to address the thermal challenge from the perspective of the architecture of the microprocessor. It proposes both the infrastructure to model the problem and several mechanisms that form part of the solution. It describes HotSpot, an efficient and accurate microarchitectural thermal modeling tool that is used to guide the design and evaluation of various thermal management techniques. It presents several Dynamic Thermal Management (DTM) schemes that distribute heat both over time and space by controlling the level of computational activity. Since processor temperature is also a function of the placement and adjacency of hot and cold functional blocks determined by the floorplan of the microprocessor, this dissertation also explores various thermally mitigating placement choices available within a single core and across multiple cores of a microprocessor. It does so through the development of HotFloorplan, a thermally-aware microarchitectural floorplanner. Finally, through an analytical framework, this research also focuses on the spatial (size) granularity at which thermal management is important. If regions of very high power density are small enough, they do not cause hot spots. The granularity study quantifies this relationship and illustrates it using three different microarchitectural examples.