From dcuestag at pdi.ucm.es  Mon Nov  2 11:29:04 2009
From: dcuestag at pdi.ucm.es (=?iso-8859-1?Q?=22David__Cuesta_G=F3mez=22?=)
Date: Mon, 02 Nov 2009 20:29:04 +0100
Subject: [Hotspot] Mailing list
Message-ID: <f645b295fbda.4aef4110@ucm.es>

I would?like?to?sign?up?in?the?hotspot?mailing?list?with?this?same?email?address

dcuestag at pdi.ucm.es

Thank?you?so much

David C.

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From dcuestag at pdi.ucm.es  Tue Nov  3 02:57:58 2009
From: dcuestag at pdi.ucm.es (=?iso-8859-1?Q?=22David__Cuesta_G=F3mez=22?=)
Date: Tue, 03 Nov 2009 11:57:58 +0100
Subject: [Hotspot] Boundary conditions
Message-ID: <f68fbbd1ca0a.4af01ac6@ucm.es>

We are using HotSpot?to validate a floorplanning?method. I have done some tests and I would like to know if by default configuration the thermal model takes into account heat transfer with the ambient, and which parameters do I have to change in order to simulate different kinds of heat transfer with the ambient, because I have tried changing the parameters:

#convection resistance at the air/PCB?interface in K/W
-r_convec_sec 50.0
#convection capacitance at the air/PCB?interface in J/K
-c_convec_sec 40.0

?in hotspot.config?but no differences appeared in the results.

Just in case, the command we are using is:

./hotspot?-c hotspot.config?-f <floorplan_file.flp> -p <power_trace_file.ptrace> -steady_file <steady_file.steady> -model_type grid -grid_steady_file <grid_steady_file.steady>

I don't know what are we skipping. Any help would be welcomed.
Thank you so much

David C.



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From wh6p at virginia.edu  Tue Nov  3 06:03:38 2009
From: wh6p at virginia.edu (Wei Huang)
Date: Tue, 03 Nov 2009 09:03:38 -0500
Subject: [Hotspot] Boundary conditions
In-Reply-To: <f68fbbd1ca0a.4af01ac6@ucm.es>
References: <f68fbbd1ca0a.4af01ac6@ucm.es>
Message-ID: <web-9448609@koi.mail.virginia.edu>

Hi,

r_convec_sec is for the secondary heat transfer path from silicon through 
PCB. This path only accounts for a small part of convection. On the other 
hand, for most thermal packages, a primary heat transfer path from silicon 
to package lid to heatsink is more important. So you may want to configure 
r_convec instead.

Hope this helps.

-Wei


On Tue, 03 Nov 2009 11:57:58 +0100
  "David  Cuesta G?mez" <dcuestag at pdi.ucm.es> wrote:
> We are using HotSpot?to validate a floorplanning?method. I have done some 
>tests and I would like to know if by default configuration the thermal 
>model takes into account heat transfer with the ambient, and which 
>parameters do I have to change in order to simulate different kinds of heat 
>transfer with the ambient, because I have tried changing the parameters:
> 
> #convection resistance at the air/PCB?interface in K/W
> -r_convec_sec 50.0
> #convection capacitance at the air/PCB?interface in J/K
> -c_convec_sec 40.0
> 
> ?in hotspot.config?but no differences appeared in the results.
> 
> Just in case, the command we are using is:
> 
> ./hotspot?-c hotspot.config?-f <floorplan_file.flp> -p 
><power_trace_file.ptrace> -steady_file <steady_file.steady> -model_type 
>grid -grid_steady_file <grid_steady_file.steady>
> 
> I don't know what are we skipping. Any help would be welcomed.
> Thank you so much
> 
> David C.
> 
> 
> 


From dcuestag at pdi.ucm.es  Wed Nov  4 02:44:24 2009
From: dcuestag at pdi.ucm.es (=?iso-8859-1?Q?=22David__Cuesta_G=F3mez=22?=)
Date: Wed, 04 Nov 2009 11:44:24 +0100
Subject: [Hotspot] Heat diffusion with ambient
Message-ID: <f704d45bc13d.4af16918@ucm.es>

Hi?you?all?again.
I have?run?some?more experiments?using?what?Wei?told?me to?adjust?the?package?description?to?the?thermal?model?which?was?really?useful, but?I'm afraid?that?I am?not?doing?it?properly?because?when?I place?three?functional?units, dissipating?the?same?power, in?the?corner?of?the?chip, in?the?side?and?in?the?centre of?the?chip, the?functional?unit?that?becomes?hotter?is?the?one?in?the?corner, followed?by?the?one?in?the?side. This, hasn't sense?for?me, since?it?is?placed?in?the?corner?it?should?be colder?than?the?other?ones?due?to?heat?interchange?with?the?heatsink?and therefore with the air. So it makes me wonder if HotSpot?takes into account the heat spread into the air. 
If not, is ther?any way to do it? 
If it does, how could I explain this weird behavior?

Thank you

David C.

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From wh6p at virginia.edu  Wed Nov  4 04:41:32 2009
From: wh6p at virginia.edu (Wei Huang)
Date: Wed, 04 Nov 2009 07:41:32 -0500
Subject: [Hotspot] Heat diffusion with ambient
In-Reply-To: <f704d45bc13d.4af16918@ucm.es>
References: <f704d45bc13d.4af16918@ucm.es>
Message-ID: <web-7516829@tetra.mail.virginia.edu>

Hi David,

In my opinion, the results you observed make perfect sense. HotSpot does 
model convection, but only at the package-air interface. Inside the package 
and silicon, everything is modeled as heat conduction, because no convection 
is involved. I am not sure what you mean by "heat spread into air"... do you 
mean the convection at four sides of the chip? If that is the case, since 
the silicon die is usually sealed inside a cavity (or chamber) with little 
air flow or even vacuum, heat convection through the side of the chip is 
really negligible. This means laterally, a block can only spread heat by 
conduction inside silicon, and blocks at the corner of the chip ends up 
hotter because they have less lateral heat conduction paths.

Hope this addressed your concern.

-Wei

On Wed, 04 Nov 2009 11:44:24 +0100
  "David  Cuesta G?mez" <dcuestag at pdi.ucm.es> wrote:
> Hi?you?all?again.
> I have?run?some?more experiments?using?what?Wei?told?me 
>to?adjust?the?package?description?to?the?thermal?model?which?was?really?useful, 
>but?I'm afraid?that?I am?not?doing?it?properly?because?when?I 
>place?three?functional?units, dissipating?the?same?power, 
>in?the?corner?of?the?chip, in?the?side?and?in?the?centre of?the?chip, 
>the?functional?unit?that?becomes?hotter?is?the?one?in?the?corner, 
>followed?by?the?one?in?the?side. This, hasn't sense?for?me, 
>since?it?is?placed?in?the?corner?it?should?be 
>colder?than?the?other?ones?due?to?heat?interchange?with?the?heatsink?and 
>therefore with the air. So it makes me wonder if HotSpot?takes into account 
>the heat spread into the air. 
> If not, is ther?any way to do it? 
> If it does, how could I explain this weird behavior?
> 
> Thank you
> 
> David C.
> 


From michaelkadin at gmail.com  Wed Nov  4 04:52:25 2009
From: michaelkadin at gmail.com (Mike Kadin)
Date: Wed, 4 Nov 2009 07:52:25 -0500
Subject: [Hotspot] Heat diffusion with ambient
In-Reply-To: <web-7516829@tetra.mail.virginia.edu>
References: <f704d45bc13d.4af16918@ucm.es>
	<web-7516829@tetra.mail.virginia.edu>
Message-ID: <34954c9d0911040452t614a3909v4692318e07e00a44@mail.gmail.com>

Hi all,

I think the answer comes from issues with cold adjacent sides.  If all of
the chip was dissipating heat, and there were hot blocks next to your test
blocks, I think David would get the behavior he is expecting.  At least
that's the behavior I found in some multicore experiments using hotspot.  (
http://portal.acm.org/citation.cfm?id=1393977&dl=GUIDE&coll=GUIDE&CFID=59867447&CFTOKEN=49830893)
My guess is that David has isolated blocks, small squares with nothing else
around them.  A small block in the middle of the floor plan has 4 sides of
totally cold silicon around it through which the heat can transfer and
dissipate upwards.  A small block near the corner only has 2 sides with cold
silicon next to it, which must be better heat sinks than the 2 sides on the
edge of the chip.  A small block on the side has 3 sides with cold silicon
next to it, and hence, its in the middle in terms of temperature.

I'm not sure if David has small isolated blocks like that, but if he did, I
think this is the correct explanation.

Mike

On Wed, Nov 4, 2009 at 7:41 AM, Wei Huang <wh6p at virginia.edu> wrote:

> Hi David,
>
> In my opinion, the results you observed make perfect sense. HotSpot does
> model convection, but only at the package-air interface. Inside the package
> and silicon, everything is modeled as heat conduction, because no
> convection
> is involved. I am not sure what you mean by "heat spread into air"... do
> you
> mean the convection at four sides of the chip? If that is the case, since
> the silicon die is usually sealed inside a cavity (or chamber) with little
> air flow or even vacuum, heat convection through the side of the chip is
> really negligible. This means laterally, a block can only spread heat by
> conduction inside silicon, and blocks at the corner of the chip ends up
> hotter because they have less lateral heat conduction paths.
>
> Hope this addressed your concern.
>
> -Wei
>
> On Wed, 04 Nov 2009 11:44:24 +0100
>  "David  Cuesta G?mez" <dcuestag at pdi.ucm.es> wrote:
> > Hi you all again.
> > I have run some more experiments using what Wei told me
>
> >to adjust the package description to the thermal model which was really useful,
> >but I'm afraid that I am not doing it properly because when I
> >place three functional units, dissipating the same power,
> >in the corner of the chip, in the side and in the centre of the chip,
> >the functional unit that becomes hotter is the one in the corner,
> >followed by the one in the side. This, hasn't sense for me,
> >since it is placed in the corner it should be
> >colder than the other ones due to heat interchange with the heatsink and
> >therefore with the air. So it makes me wonder if HotSpot takes into
> account
> >the heat spread into the air.
> > If not, is ther any way to do it?
> > If it does, how could I explain this weird behavior?
> >
> > Thank you
> >
> > David C.
> >
>
> _______________________________________________
> HotSpot mailing list
> HotSpot at mail.cs.virginia.edu
> http://www.cs.virginia.edu/mailman/listinfo/hotspot
>
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From dcuestag at pdi.ucm.es  Wed Nov  4 06:18:31 2009
From: dcuestag at pdi.ucm.es (=?iso-8859-1?Q?=22David__Cuesta_G=F3mez=22?=)
Date: Wed, 04 Nov 2009 15:18:31 +0100
Subject: [Hotspot] Heat diffusion with ambient
In-Reply-To: <34954c9d0911040452t614a3909v4692318e07e00a44@mail.gmail.com>
References: <f704d45bc13d.4af16918@ucm.es>
	<web-7516829@tetra.mail.virginia.edu>
	<34954c9d0911040452t614a3909v4692318e07e00a44@mail.gmail.com>
Message-ID: <f6dab44817983.4af19b47@ucm.es>

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From bernauer at informatik.uni-tuebingen.de  Wed Nov  4 06:21:00 2009
From: bernauer at informatik.uni-tuebingen.de (Andreas Bernauer)
Date: Wed, 4 Nov 2009 15:21:00 +0100
Subject: [Hotspot] Heat diffusion with ambient
In-Reply-To: <34954c9d0911040452t614a3909v4692318e07e00a44@mail.gmail.com>
References: <f704d45bc13d.4af16918@ucm.es>
	<web-7516829@tetra.mail.virginia.edu>
	<34954c9d0911040452t614a3909v4692318e07e00a44@mail.gmail.com>
Message-ID: <c92980110911040621k7ea7dfa8s64c0f560f8145256@mail.gmail.com>

On Wed, Nov 4, 2009 at 13:52, Mike Kadin <michaelkadin at gmail.com> wrote:
> My guess is that David has isolated blocks, small squares with nothing else
> around them.? A small block in the middle of the floor plan has 4 sides of
> totally cold silicon around it through which the heat can transfer and
> dissipate upwards.? A small block near the corner only has 2 sides with cold
> silicon next to it, which must be better heat sinks than the 2 sides on the
> edge of the chip.? A small block on the side has 3 sides with cold silicon
> next to it, and hence, its in the middle in terms of temperature.
>
> I'm not sure if David has small isolated blocks like that, but if he did, I
> think this is the correct explanation.

David sent me the floorplan: he has indeed small isolated blocks, and
thus I also think that your explanations are correct.

I did not know that HotSpot assumes vacuum at the side of the chip,
but Wei's explanation makes sense.

-- 
Andreas Bernauer <bernauer at informatik.uni-tuebingen.de>
WSI/TI, Sand 13, B202, 72076 T?bingen, +49 70 71 29 75 940
http://www.ti.uni-tuebingen.de/Andreas_Bernauer.227.0.html


From bernauer at informatik.uni-tuebingen.de  Wed Nov  4 06:45:27 2009
From: bernauer at informatik.uni-tuebingen.de (Andreas Bernauer)
Date: Wed, 4 Nov 2009 15:45:27 +0100
Subject: [Hotspot] Heat diffusion with ambient
In-Reply-To: <f6dab44817983.4af19b47@ucm.es>
References: <f704d45bc13d.4af16918@ucm.es>
	<web-7516829@tetra.mail.virginia.edu>
	<34954c9d0911040452t614a3909v4692318e07e00a44@mail.gmail.com>
	<f6dab44817983.4af19b47@ucm.es>
Message-ID: <c92980110911040645x13e10dccy65c17d60769092fb@mail.gmail.com>

David,

2009/11/4 "David  Cuesta G?mez" <dcuestag at pdi.ucm.es>:
> The?small?empty?cells?do not?dissipate?any?power?at?all, they?are
> just?to?fill?the?complete floorplan.

But small empty cells also take up the heat of the adjacent cores.

The cores in the corner (eg. Core1) have cold silicon only at two
sides, while the cores in the middle (eg. Core6) have cold silicon at
four sides (negleting the caches, which don't contribute
significantly.)

As Wei said, the chip is simulated with vacuum surrounding it (eg.,
there's not heat sink north or west of Core1 but vacuum, thus no heat
conduction towards north or west for Core1, thus more heating).

Feel free to ask again if that's not clear enough.

-- 
Andreas Bernauer <bernauer at informatik.uni-tuebingen.de>
WSI/TI, Sand 13, B202, 72076 T?bingen, +49 70 71 29 75 940
http://www.ti.uni-tuebingen.de/Andreas_Bernauer.227.0.html


From dcuestag at pdi.ucm.es  Wed Nov  4 07:23:02 2009
From: dcuestag at pdi.ucm.es (=?iso-8859-1?Q?=22David__Cuesta_G=F3mez=22?=)
Date: Wed, 04 Nov 2009 16:23:02 +0100
Subject: [Hotspot] Heat diffusion with ambient
In-Reply-To: <c92980110911040645x13e10dccy65c17d60769092fb@mail.gmail.com>
References: <f704d45bc13d.4af16918@ucm.es>
	<web-7516829@tetra.mail.virginia.edu>
	<34954c9d0911040452t614a3909v4692318e07e00a44@mail.gmail.com>
	<f6dab44817983.4af19b47@ucm.es>
	<c92980110911040645x13e10dccy65c17d60769092fb@mail.gmail.com>
Message-ID: <f674c6d080f1.4af1aa66@ucm.es>

OK?with?those?comments?it?makes?perfectly?sense, I have?to?meditate?a little?bit more about?it?because?I didn't know?that?the?chip was?surrounded?by?a vacuum?chamber.
If?have?have?more doubts?I will?let?you?know?:)
Thank?you?all?

David C.

----- Mensaje?original -----
De: Andreas?Bernauer?<bernauer at informatik.uni-tuebingen.de>
Fecha: Mi?rcoles, Noviembre?4, 2009 15:45
Asunto: Re: [Hotspot] Heat?diffusion?with?ambient
A: David Cuesta?G?mez?<dcuestag at pdi.ucm.es>
CC: hotspot at mail.cs.virginia.edu

> David,
> 
> 2009/11/4 "David? Cuesta?G?mez" <dcuestag at pdi.ucm.es>:
> > The?small?empty?cells?do not?dissipate?any?power?at?all, they?are
> > just?to?fill?the?complete floorplan.
> 
> But small empty cells also take up the heat of the adjacent cores.
> 
> The cores in the corner (eg. Core1) have cold silicon only at two
> sides, while the cores in the middle (eg. Core6) have cold 
> silicon at
> four sides (negleting the caches, which don't contribute
> significantly.)
> 
> As Wei said, the chip is simulated with vacuum surrounding it (eg.,
> there's not heat sink north or west of Core1 but vacuum, thus no heat
> conduction towards north or west for Core1, thus more heating).
> 
> Feel free to ask again if that's not clear enough.
> 
> -- 
> Andreas Bernauer <bernauer at informatik.uni-tuebingen.de>
> WSI/TI, Sand 13, B202, 72076 T?bingen, +49 70 71 29 75 940
> http://www.ti.uni-tuebingen.de/Andreas_Bernauer.227.0.html
> 
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From skadron at cs.virginia.edu  Wed Nov  4 07:31:46 2009
From: skadron at cs.virginia.edu (Kevin Skadron)
Date: Wed, 04 Nov 2009 10:31:46 -0500
Subject: [Hotspot] Heat diffusion with ambient
In-Reply-To: <f674c6d080f1.4af1aa66@ucm.es>
References: <f704d45bc13d.4af16918@ucm.es>	<web-7516829@tetra.mail.virginia.edu>	<34954c9d0911040452t614a3909v4692318e07e00a44@mail.gmail.com>	<f6dab44817983.4af19b47@ucm.es>	<c92980110911040645x13e10dccy65c17d60769092fb@mail.gmail.com>
	<f674c6d080f1.4af1aa66@ucm.es>
Message-ID: <4AF19E62.9000701@cs.virginia.edu>

There are two issues.  One is that the die is sealed inside its package, 
so there is no airflow past the edge of the die, limiting heat removal 
via convection.  Even if there were airflow, there is also the fact that 
the surface area for convective transfer off the edge of the die is 
minimal (die is probably less than 0.5mm thick).

/K

David Cuesta G?mez wrote:
> OK with those comments it makes perfectly sense, I have to meditate a 
> little bit more about it because I didn't know that the chip 
> was surrounded by a vacuum chamber.
> If have have more doubts I will let you know :)
> Thank you all 
> 
> David C.
> 
> ----- Mensaje original -----
> De: Andreas Bernauer <bernauer at informatik.uni-tuebingen.de>
> Fecha: Mi?rcoles, Noviembre 4, 2009 15:45
> Asunto: Re: [Hotspot] Heat diffusion with ambient
> A: David Cuesta G?mez <dcuestag at pdi.ucm.es>
> CC: hotspot at mail.cs.virginia.edu
> 
>  > David,
>  >
>  > 2009/11/4 "David  Cuesta G?mez" <dcuestag at pdi.ucm.es>:
>  > > The small empty cells do not dissipate any power at all, they are
>  > > just to fill the complete floorplan.
>  >
>  > But small empty cells also take up the heat of the adjacent cores.
>  >
>  > The cores in the corner (eg. Core1) have cold silicon only at two
>  > sides, while the cores in the middle (eg. Core6) have cold
>  > silicon at
>  > four sides (negleting the caches, which don't contribute
>  > significantly.)
>  >
>  > As Wei said, the chip is simulated with vacuum surrounding it (eg.,
>  > there's not heat sink north or west of Core1 but vacuum, thus no heat
>  > conduction towards north or west for Core1, thus more heating).
>  >
>  > Feel free to ask again if that's not clear enough.
>  >
>  > --
>  > Andreas Bernauer <bernauer at informatik.uni-tuebingen.de>
>  > WSI/TI, Sand 13, B202, 72076 T?bingen, +49 70 71 29 75 940
>  > http://www.ti.uni-tuebingen.de/Andreas_Bernauer.227.0.html
>  >
> 
> 
> ------------------------------------------------------------------------
> 
> _______________________________________________
> HotSpot mailing list
> HotSpot at mail.cs.virginia.edu
> http://www.cs.virginia.edu/mailman/listinfo/hotspot


From slogan at ucsc.edu  Wed Nov  4 15:27:58 2009
From: slogan at ucsc.edu (Sheldon Logan)
Date: Wed, 04 Nov 2009 15:27:58 -0800
Subject: [Hotspot] tolerant_floor, tolerant_ceil
Message-ID: <4AF20DFE.6080307@ucsc.edu>

I was wondering why in the set_bgmap function in hotspot the functions 
tolerant_floor, and tolerant_ceil are used as opposed to the normal 
floor or ceil C functions. I have been having trouble with multi-layer 
simulations..Even thought the layers have the same width and same 
height, I sometimes get the negative grid cell start index! or the grid 
cell end index out of bounds! errors.

From wh6p at virginia.edu  Thu Nov  5 08:55:48 2009
From: wh6p at virginia.edu (Wei Huang)
Date: Thu, 05 Nov 2009 11:55:48 -0500
Subject: [Hotspot] tolerant_floor, tolerant_ceil
In-Reply-To: <4AF20DFE.6080307@ucsc.edu>
References: <4AF20DFE.6080307@ucsc.edu>
Message-ID: <web-7544267@neon.mail.virginia.edu>

Hi Sheldon,

This is the first time we hear this type of problems. Does it happen only in 
3D case or in 2D case as well? Is there anything special in your floorplans 
(e.g. high aspect ratio)? It would help if you can forward us the floorplans 
and other relavant files (config, layer file, etc) so that we can try to 
replicate your problem and find out the reason.

Thanks,
-Wei

On Wed, 04 Nov 2009 15:27:58 -0800
  Sheldon Logan <slogan at ucsc.edu> wrote:
> I was wondering why in the set_bgmap function in hotspot the functions 
> tolerant_floor, and tolerant_ceil are used as opposed to the normal 
> floor or ceil C functions. I have been having trouble with multi-layer 
> simulations..Even thought the layers have the same width and same 
> height, I sometimes get the negative grid cell start index! or the grid 
> cell end index out of bounds! errors.
> _______________________________________________
> HotSpot mailing list
> HotSpot at mail.cs.virginia.edu
> http://www.cs.virginia.edu/mailman/listinfo/hotspot


From ks4kk at virginia.edu  Thu Nov  5 12:03:35 2009
From: ks4kk at virginia.edu (Karthik Sankaranarayanan)
Date: Thu, 5 Nov 2009 12:03:35 -0800
Subject: [Hotspot] tolerant_floor, tolerant_ceil
In-Reply-To: <web-7544267@neon.mail.virginia.edu>
References: <4AF20DFE.6080307@ucsc.edu> <web-7544267@neon.mail.virginia.edu>
Message-ID: <eae341010911051203h4f739147t1b04cdeab36ffa6@mail.gmail.com>

Hello Sheldon,

The reason of tolerant_ceil/floor functions being used had to do with X86
floating point hardware. In X87 FPU, the computations happen with extended
precision (more than double) and the reduction  happens at the time of
storing to memory. I do not remember the details but this issue gave us some
problems when the numbers were very close to integers. So, we went for
tolerant_ceil/floor

This should not give you problems as long as the floorplan is well formed.
Following couple of pointers might be of help:

1) In set_bgmap, uncommenting the test_bgmap function can unravel any
floorplan errors early on.
2) If you are sure the floorplan is OK, (and if you do not have the X86 FP
precision problem - see
http://www.network-theory.co.uk/docs/gccintro/gccintro_70.html ), either
a) changing the DELTA value in util.h to the desired precision or
b) changing the tolerant_ceil/floor back to regular ceil/floor  functions
might be useful.

Hope this helps.

Thanks,
-karthik

On Thu, Nov 5, 2009 at 8:55 AM, Wei Huang <wh6p at virginia.edu> wrote:

> Hi Sheldon,
>
> This is the first time we hear this type of problems. Does it happen only
> in
> 3D case or in 2D case as well? Is there anything special in your floorplans
> (e.g. high aspect ratio)? It would help if you can forward us the
> floorplans
> and other relavant files (config, layer file, etc) so that we can try to
> replicate your problem and find out the reason.
>
> Thanks,
> -Wei
>
> On Wed, 04 Nov 2009 15:27:58 -0800
>  Sheldon Logan <slogan at ucsc.edu> wrote:
> > I was wondering why in the set_bgmap function in hotspot the functions
> > tolerant_floor, and tolerant_ceil are used as opposed to the normal
> > floor or ceil C functions. I have been having trouble with multi-layer
> > simulations..Even thought the layers have the same width and same
> > height, I sometimes get the negative grid cell start index! or the grid
> > cell end index out of bounds! errors.
> > _______________________________________________
> > HotSpot mailing list
> > HotSpot at mail.cs.virginia.edu
> > http://www.cs.virginia.edu/mailman/listinfo/hotspot
>
> _______________________________________________
> HotSpot mailing list
> HotSpot at mail.cs.virginia.edu
> http://www.cs.virginia.edu/mailman/listinfo/hotspot
>
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From mkayaalp at etu.edu.tr  Fri Nov  6 04:12:09 2009
From: mkayaalp at etu.edu.tr (Mehmet Kayaalp)
Date: Fri, 6 Nov 2009 14:12:09 +0200
Subject: [Hotspot] Power trace request
Message-ID: <e1ee95040911060412s515899f4y1fce76b08e57c63b@mail.gmail.com>

Hello,

I want to use HotSpot to examine the effect of the floorplanning in 3D
stacking. However I understand that generating power traces requires a
non-trivial effort. Is it possible for you to share the power traces for a
benchmark suite like the sample one provided for gcc, but for many
benchmarks and for a longer run (like a billion instructions)? And also a
corresponding floorplan?

Thanks in advance.

Mehmet Kayaalp
Department of Computer Engineering
TOBB University of Economics and Technology, Turkey
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From bartosz.wojciechowski at pwr.wroc.pl  Sun Nov  8 02:25:32 2009
From: bartosz.wojciechowski at pwr.wroc.pl (Bartosz Wojciechowski)
Date: Sun, 08 Nov 2009 11:25:32 +0100
Subject: [Hotspot]  floorplan tools
Message-ID: <7460e71d735a.4af6aaac@pwr.wroc.pl>


Hello All,

I was wondering what, if any, tools do You use to
create your own floorplans. And are You willing to share them:-)
I'd like to alter and combine floorplans in HotSpot format
reliably and easily. And I hate GUIs, but wouldn't mind graphical
output with no more than a command or two:-)
Evetually i'll write my own tools, but I thought I'd ask here first.

-- 
Greetings,
Bartosz Wojciechowski

From wh6p at virginia.edu  Sun Nov  8 09:17:59 2009
From: wh6p at virginia.edu (Wei Huang)
Date: Sun, 08 Nov 2009 12:17:59 -0500
Subject: [Hotspot] floorplan tools
In-Reply-To: <7460e71d735a.4af6aaac@pwr.wroc.pl>
References: <7460e71d735a.4af6aaac@pwr.wroc.pl>
Message-ID: <web-8436056@guppy.mail.virginia.edu>

Hi Bartosz,

There is an integrated floorplanning tool in recent HotSpot releases, called 
HotFloorplanner. You can check out the documentations of HotSpot that 
provides further details and papers for that tool.

Regards,
-Wei


On Sun, 08 Nov 2009 11:25:32 +0100
  Bartosz Wojciechowski <bartosz.wojciechowski at pwr.wroc.pl> wrote:
> 
> Hello All,
> 
> I was wondering what, if any, tools do You use to
> create your own floorplans. And are You willing to share them:-)
> I'd like to alter and combine floorplans in HotSpot format
> reliably and easily. And I hate GUIs, but wouldn't mind graphical
> output with no more than a command or two:-)
> Evetually i'll write my own tools, but I thought I'd ask here first.
> 
> -- 
> Greetings,
> Bartosz Wojciechowski
> _______________________________________________
> HotSpot mailing list
> HotSpot at mail.cs.virginia.edu
> http://www.cs.virginia.edu/mailman/listinfo/hotspot


From anandmay22 at gmail.com  Fri Nov 13 03:12:14 2009
From: anandmay22 at gmail.com (Anand J stephen)
Date: Fri, 13 Nov 2009 16:42:14 +0530
Subject: [Hotspot] need temperature meaurement tool for MCNC
Message-ID: <46be924c0911130312h454e8b7l3c07bf16e0b32bb6@mail.gmail.com>

Hi all

      Is there any tool to measure the temperature of MCNC benchamrk files.
Is it possible  by HOTSPOT. i want to measure the temperature of my
floorplan....

-- 
Best Regards
Anand. J.Stephen

Research Scholar
National Center for Advance Research in Discrete Mathematics
(Sponsored  by Dept of Science and Technology,Govt of India)
Kalasalingam University
TamilNadu
India
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From skadron at cs.virginia.edu  Fri Nov 13 05:11:11 2009
From: skadron at cs.virginia.edu (Kevin Skadron)
Date: Fri, 13 Nov 2009 08:11:11 -0500
Subject: [Hotspot] need temperature meaurement tool for MCNC
In-Reply-To: <46be924c0911130312h454e8b7l3c07bf16e0b32bb6@mail.gmail.com>
References: <46be924c0911130312h454e8b7l3c07bf16e0b32bb6@mail.gmail.com>
Message-ID: <4AFD5AEF.70709@cs.virginia.edu>

HotSpot can simulate the temperature for a given geometry of the chip, 
package, and cooling solution.  In addition to these inputs, it also 
requires as input a floorplan at the resolution for which you want to 
acquire the temperature data (one temperature per functional block on 
the chip, one temperature per mm^2, etc), and power dissipation in each 
block of this floorplan.  There are many tools that can provide this 
information, such as the Wattch simulator.

/K

Anand J stephen wrote:
> Hi all
> 
>       Is there any tool to measure the temperature of MCNC benchamrk 
> files. Is it possible  by HOTSPOT. i want to measure the temperature of 
> my floorplan....
> 
> -- 
> Best Regards
> Anand. J.Stephen
> 
> Research Scholar
> National Center for Advance Research in Discrete Mathematics
> (Sponsored  by Dept of Science and Technology,Govt of India)
> Kalasalingam University
> TamilNadu
> India
> 
> 
> ------------------------------------------------------------------------
> 
> _______________________________________________
> HotSpot mailing list
> HotSpot at mail.cs.virginia.edu
> http://www.cs.virginia.edu/mailman/listinfo/hotspot

From fargh232 at student.liu.se  Wed Nov 18 12:25:28 2009
From: fargh232 at student.liu.se (Farrokh Ghani Zadegan)
Date: Wed, 18 Nov 2009 21:25:28 +0100
Subject: [Hotspot] Stepping Back in Simulation Time
Message-ID: <001b01ca688d$4504cb60$cf0e6220$@liu.se>

Hi!

1. Is it possible to step back in simulation time- i.e. undo the effect of
previous call to compute_temp()?
2. Is it correct to assume that during steady-state calculations, only
thermal resistances and not the capacitances are taken into account?

Regards,
Farrokh


From skadron at cs.virginia.edu  Fri Nov 20 15:33:28 2009
From: skadron at cs.virginia.edu (Kevin Skadron)
Date: Fri, 20 Nov 2009 15:33:28 -0800
Subject: [Hotspot] Stepping Back in Simulation Time
In-Reply-To: <001b01ca688d$4504cb60$cf0e6220$@liu.se>
References: <001b01ca688d$4504cb60$cf0e6220$@liu.se>
Message-ID: <4B072748.5050307@cs.virginia.edu>

It should be possible, but we haven't implemented it.  If you end up 
implementing it, we would love to add it to the next version.

Re #2, yes, that is correct.

/K

Farrokh Ghani Zadegan wrote:
> Hi!
> 
> 1. Is it possible to step back in simulation time- i.e. undo the effect of
> previous call to compute_temp()?
> 2. Is it correct to assume that during steady-state calculations, only
> thermal resistances and not the capacitances are taken into account?
> 
> Regards,
> Farrokh
> 
> _______________________________________________
> HotSpot mailing list
> HotSpot at mail.cs.virginia.edu
> http://www.cs.virginia.edu/mailman/listinfo/hotspot


From mkayaalp at etu.edu.tr  Sat Nov 21 00:01:08 2009
From: mkayaalp at etu.edu.tr (Mehmet Kayaalp)
Date: Sat, 21 Nov 2009 10:01:08 +0200
Subject: [Hotspot] Power trace request
In-Reply-To: <4B072E0E.4040005@cs.virginia.edu>
References: <e1ee95040911060412s515899f4y1fce76b08e57c63b@mail.gmail.com> 
	<4B072E0E.4040005@cs.virginia.edu>
Message-ID: <e1ee95040911210001g1b0a3b57s52bdf77c82a23874@mail.gmail.com>

On Sat, Nov 21, 2009 at 2:02 AM, Kevin Skadron <skadron at cs.virginia.edu>wrote:

> Mehmet,
>
> We've been discussing this within our group, and we're reluctant to release
> power traces, because those are very specific to the particular
> configuration from which they were obtained.

I wanted to compare peak temperatures of two floorplans, so the underlying
configuration/architecture does not seem to be much of importantance.

> In particular, adapting a power trace obtained from a 2D config for use
> with a 3D organization seems risky.
>
What do you mean by a 2D config? I was planning to use power values from
sim-wattch with default configuration -if I can handle the correspondence of
values with blocks in floorplan. Should I also tweak the simulator to make
it 3D?

> --Kevin
>
> Mehmet Kayaalp wrote:
>
>> Hello,
>>
>> I want to use HotSpot to examine the effect of the floorplanning in 3D
>> stacking. However I understand that generating power traces requires a
>> non-trivial effort. Is it possible for you to share the power traces for a
>> benchmark suite like the sample one provided for gcc, but for many
>> benchmarks and for a longer run (like a billion instructions)? And also a
>> corresponding floorplan?
>>
>> Thanks in advance.
>>
>> Mehmet Kayaalp
>> Department of Computer Engineering
>> TOBB University of Economics and Technology, Turkey
>>
>>
>> ------------------------------------------------------------------------
>>
>> _______________________________________________
>> HotSpot mailing list
>> HotSpot at mail.cs.virginia.edu
>> http://www.cs.virginia.edu/mailman/listinfo/hotspot
>>
>
>
>
> !DSPAM:3101,4b074005709817425868!
>
>
>
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From wh6p at virginia.edu  Sat Nov 21 15:34:46 2009
From: wh6p at virginia.edu (Wei Huang)
Date: Sat, 21 Nov 2009 18:34:46 -0500
Subject: [Hotspot] Power trace request
In-Reply-To: <e1ee95040911210001g1b0a3b57s52bdf77c82a23874@mail.gmail.com>
References: <e1ee95040911060412s515899f4y1fce76b08e57c63b@mail.gmail.com>
	<4B072E0E.4040005@cs.virginia.edu>
	<e1ee95040911210001g1b0a3b57s52bdf77c82a23874@mail.gmail.com>
Message-ID: <web-8525656@guppy.mail.virginia.edu>

Hi Mehmet,

 From your description, I think the sample gcc power trace would be useful 
to you. The longer power traces we have are for particular processors, which 
may not accurately track the power consumptions of the processor you are 
simulating.

RE 2D and 3D configs, our existing power traces were generated for 2D chips. 
3D chips would be significantly different (for example, different power 
consumption from the interconnect load). Therefore, I would not recommend 
use our 2D power traces for 3D chip research.

Hope this is helpful.

-Wei

On Sat, 21 Nov 2009 10:01:08 +0200
  Mehmet Kayaalp <mkayaalp at etu.edu.tr> wrote:
> On Sat, Nov 21, 2009 at 2:02 AM, Kevin Skadron 
><skadron at cs.virginia.edu>wrote:
> 
>> Mehmet,
>>
>> We've been discussing this within our group, and we're reluctant to 
>>release
>> power traces, because those are very specific to the particular
>> configuration from which they were obtained.
> 
> I wanted to compare peak temperatures of two floorplans, so the underlying
> configuration/architecture does not seem to be much of importantance.
> 
>> In particular, adapting a power trace obtained from a 2D config for use
>> with a 3D organization seems risky.
>>
> What do you mean by a 2D config? I was planning to use power values from
> sim-wattch with default configuration -if I can handle the correspondence 
>of
> values with blocks in floorplan. Should I also tweak the simulator to make
> it 3D?
> 
>> --Kevin
>>
>> Mehmet Kayaalp wrote:
>>
>>> Hello,
>>>
>>> I want to use HotSpot to examine the effect of the floorplanning in 3D
>>> stacking. However I understand that generating power traces requires a
>>> non-trivial effort. Is it possible for you to share the power traces for a
>>> benchmark suite like the sample one provided for gcc, but for many
>>> benchmarks and for a longer run (like a billion instructions)? And also a
>>> corresponding floorplan?
>>>
>>> Thanks in advance.
>>>
>>> Mehmet Kayaalp
>>> Department of Computer Engineering
>>> TOBB University of Economics and Technology, Turkey
>>>
>>>
>>> ------------------------------------------------------------------------
>>>
>>> _______________________________________________
>>> HotSpot mailing list
>>> HotSpot at mail.cs.virginia.edu
>>> http://www.cs.virginia.edu/mailman/listinfo/hotspot
>>>
>>
>>
>>
>> !DSPAM:3101,4b074005709817425868!
>>
>>
>>


From mkayaalp at etu.edu.tr  Sun Nov 22 03:42:37 2009
From: mkayaalp at etu.edu.tr (Mehmet Kayaalp)
Date: Sun, 22 Nov 2009 06:42:37 -0500
Subject: [Hotspot] Power trace request
In-Reply-To: <web-8525656@guppy.mail.virginia.edu>
References: <e1ee95040911060412s515899f4y1fce76b08e57c63b@mail.gmail.com> 
	<4B072E0E.4040005@cs.virginia.edu>
	<e1ee95040911210001g1b0a3b57s52bdf77c82a23874@mail.gmail.com> 
	<web-8525656@guppy.mail.virginia.edu>
Message-ID: <e1ee95040911220342x60e39a56xe448a653da5f195f@mail.gmail.com>

Hi,
Thanks for the quick reply. I have a couple of other questions then.

Are we able to use Sim-Wattch without making substantial changes? The
power information that Wattch gives by default are, power values of:

icache (including itb)
dcache (including dtb)
dcache2
bpred
lsq
falu
alu
regfile (architectural, i think)
rename
window
resultbus
clock

and here are the names of the blocks given in ev6.flp:

L2
Dcache
Icache
Bpred
DTB
ITB
LdStQ
FPMul
FPAdd      IntAdd
FPMap???? IntMap
FPReg? ? ? IntReg
FPQ???? ? ? IntQ

Is there a one-to-one correspondance between these? Can we divide
"window", "rename", "regfile" values to two, for floating and int
blocks? In which blocks should we account for "resultbus" and "clock"
power?

For 3D chips, I am not planning to divide blocks into different
layers. I want to move some whole blocks to other layers, e.g. last
level cache in one layer, and the rest in other. Would there be
significant interconnect load? And if there is, how could I implement
it in Wattch?

Thanks for your time,
Mehmet Kayaalp
Department of Computer Engineering
TOBB University of Economics and Technology, Turkey

On Sat, Nov 21, 2009 at 6:34 PM, Wei Huang <wh6p at virginia.edu> wrote:
>
> Hi Mehmet,
>
> From your description, I think the sample gcc power trace would be useful to you. The longer power traces we have are for particular processors, which may not accurately track the power consumptions of the processor you are simulating.
>
> RE 2D and 3D configs, our existing power traces were generated for 2D chips. 3D chips would be significantly different (for example, different power consumption from the interconnect load). Therefore, I would not recommend use our 2D power traces for 3D chip research.
>
> Hope this is helpful.
>
> -Wei
>
> On Sat, 21 Nov 2009 10:01:08 +0200
> ?Mehmet Kayaalp <mkayaalp at etu.edu.tr> wrote:
>>
>> On Sat, Nov 21, 2009 at 2:02 AM, Kevin Skadron <skadron at cs.virginia.edu>wrote:
>>
>>> Mehmet,
>>>
>>> We've been discussing this within our group, and we're reluctant to release
>>> power traces, because those are very specific to the particular
>>> configuration from which they were obtained.
>>
>> I wanted to compare peak temperatures of two floorplans, so the underlying
>> configuration/architecture does not seem to be much of importantance.
>>
>>> In particular, adapting a power trace obtained from a 2D config for use
>>> with a 3D organization seems risky.
>>>
>> What do you mean by a 2D config? I was planning to use power values from
>> sim-wattch with default configuration -if I can handle the correspondence of
>> values with blocks in floorplan. Should I also tweak the simulator to make
>> it 3D?
>>
>>> --Kevin
>>>
>>> Mehmet Kayaalp wrote:
>>>
>>>> Hello,
>>>>
>>>> I want to use HotSpot to examine the effect of the floorplanning in 3D
>>>> stacking. However I understand that generating power traces requires a
>>>> non-trivial effort. Is it possible for you to share the power traces for a
>>>> benchmark suite like the sample one provided for gcc, but for many
>>>> benchmarks and for a longer run (like a billion instructions)? And also a
>>>> corresponding floorplan?
>>>>
>>>> Thanks in advance.
>>>>
>>>> Mehmet Kayaalp
>>>> Department of Computer Engineering
>>>> TOBB University of Economics and Technology, Turkey
>>>>
>>>>
>>>> ------------------------------------------------------------------------
>>>>
>>>> _______________________________________________
>>>> HotSpot mailing list
>>>> HotSpot at mail.cs.virginia.edu
>>>> http://www.cs.virginia.edu/mailman/listinfo/hotspot
>>>>
>>>
>>>
>>>
>>>
>>>
>>>
>>>
>
>
>
> !DSPAM:3101,4b087c35709126662971!
>
>


From mkayaalp at etu.edu.tr  Sun Nov 22 04:14:09 2009
From: mkayaalp at etu.edu.tr (Mehmet Kayaalp)
Date: Sun, 22 Nov 2009 07:14:09 -0500
Subject: [Hotspot] Appropriate simulation interval and ptrace length?
Message-ID: <e1ee95040911220414w2512a0e3y4c8d542194639a69@mail.gmail.com>

Hello again,
I have another quick newbie question. When we run a microarchitectural
simulation, we simulate for one or two billion commits, approximately
1-2 seconds of execution. But in HotSpot, default interval of the
simulation is 10K cycles @ 3GHz, and sample gcc ptrace has 100
intervals. So using gcc sample, we are simulating only 0.3
milliseconds of execution. Would it be enough to put in the results
section of a paper? Would temperature values change over a much longer
execution?
Mehmet Kayaalp
Department of Computer Engineering
TOBB University of Economics and Technology, Turkey

From wh6p at virginia.edu  Sun Nov 22 12:29:17 2009
From: wh6p at virginia.edu (Wei Huang)
Date: Sun, 22 Nov 2009 15:29:17 -0500
Subject: [Hotspot] Appropriate simulation interval and ptrace length?
In-Reply-To: <e1ee95040911220414w2512a0e3y4c8d542194639a69@mail.gmail.com>
References: <e1ee95040911220414w2512a0e3y4c8d542194639a69@mail.gmail.com>
Message-ID: <web-7651977@neon.mail.virginia.edu>

Hi,

0.3 milliseconds probably are not enough for a typical thermal cycle, you 
may want to run a longer simulation. In addition, the simulation should 
first be "warmed up" both thermally and architecturally (please refer to our 
ISCA'03 paper for more information regarding this).

-Wei


  On Sun, 22 Nov 2009 07:14:09 -0500
  Mehmet Kayaalp <mkayaalp at etu.edu.tr> wrote:
> Hello again,
> I have another quick newbie question. When we run a microarchitectural
> simulation, we simulate for one or two billion commits, approximately
> 1-2 seconds of execution. But in HotSpot, default interval of the
> simulation is 10K cycles @ 3GHz, and sample gcc ptrace has 100
> intervals. So using gcc sample, we are simulating only 0.3
> milliseconds of execution. Would it be enough to put in the results
> section of a paper? Would temperature values change over a much longer
> execution?
> Mehmet Kayaalp
> Department of Computer Engineering
> TOBB University of Economics and Technology, Turkey
> _______________________________________________
> HotSpot mailing list
> HotSpot at mail.cs.virginia.edu
> http://www.cs.virginia.edu/mailman/listinfo/hotspot


From skadron at cs.virginia.edu  Wed Nov 25 11:26:14 2009
From: skadron at cs.virginia.edu (Kevin Skadron)
Date: Wed, 25 Nov 2009 14:26:14 -0500
Subject: [Hotspot] Power trace request
In-Reply-To: <e1ee95040911220342x60e39a56xe448a653da5f195f@mail.gmail.com>
References: <e1ee95040911060412s515899f4y1fce76b08e57c63b@mail.gmail.com>
	<4B072E0E.4040005@cs.virginia.edu>	<e1ee95040911210001g1b0a3b57s52bdf77c82a23874@mail.gmail.com>
	<web-8525656@guppy.mail.virginia.edu>
	<e1ee95040911220342x60e39a56xe448a653da5f195f@mail.gmail.com>
Message-ID: <4B0D84D6.4010806@cs.virginia.edu>

No, there's not really a 1:1 mapping.  Wattch as it comes "out of the 
box" is designed for a specific microarchitecture and pipeline depth and 
only captures data for those blocks you enumerated below.

We modified the power model back in 2002 to match the microarchitecture 
and power data we obtained for the EV7, and the illustrative floorplan 
and power traces are based upon that.

Also, you wouldn't just want to divide those power values in two, since 
those structures don't scale linearly.

HotSpot is intended to be a portable, flexible library for modeling 
temperature given a power model and floorplan provided by the user.  The 
power and floorplan materials we provided were only to show how the 
integration should work.  The diversity of architectures, floorplans, 
and power-dissipation considerations that HotSpot is intended to support 
are so diverse and change so fast with technology that we felt this was 
something that is better provided by the user with knowledge of their 
particular model.  We're certainly open to suggestions on how to provide 
a better "starter kit"!

/K

Mehmet Kayaalp wrote:
> Hi,
> Thanks for the quick reply. I have a couple of other questions then.
> 
> Are we able to use Sim-Wattch without making substantial changes? The
> power information that Wattch gives by default are, power values of:
> 
> icache (including itb)
> dcache (including dtb)
> dcache2
> bpred
> lsq
> falu
> alu
> regfile (architectural, i think)
> rename
> window
> resultbus
> clock
> 
> and here are the names of the blocks given in ev6.flp:
> 
> L2
> Dcache
> Icache
> Bpred
> DTB
> ITB
> LdStQ
> FPMul
> FPAdd      IntAdd
> FPMap     IntMap
> FPReg      IntReg
> FPQ         IntQ
> 
> Is there a one-to-one correspondance between these? Can we divide
> "window", "rename", "regfile" values to two, for floating and int
> blocks? In which blocks should we account for "resultbus" and "clock"
> power?
> 
> For 3D chips, I am not planning to divide blocks into different
> layers. I want to move some whole blocks to other layers, e.g. last
> level cache in one layer, and the rest in other. Would there be
> significant interconnect load? And if there is, how could I implement
> it in Wattch?
> 
> Thanks for your time,
> Mehmet Kayaalp
> Department of Computer Engineering
> TOBB University of Economics and Technology, Turkey
> 
> On Sat, Nov 21, 2009 at 6:34 PM, Wei Huang <wh6p at virginia.edu> wrote:
>> Hi Mehmet,
>>
>> From your description, I think the sample gcc power trace would be useful to you. The longer power traces we have are for particular processors, which may not accurately track the power consumptions of the processor you are simulating.
>>
>> RE 2D and 3D configs, our existing power traces were generated for 2D chips. 3D chips would be significantly different (for example, different power consumption from the interconnect load). Therefore, I would not recommend use our 2D power traces for 3D chip research.
>>
>> Hope this is helpful.
>>
>> -Wei
>>
>> On Sat, 21 Nov 2009 10:01:08 +0200
>>  Mehmet Kayaalp <mkayaalp at etu.edu.tr> wrote:
>>> On Sat, Nov 21, 2009 at 2:02 AM, Kevin Skadron <skadron at cs.virginia.edu>wrote:
>>>
>>>> Mehmet,
>>>>
>>>> We've been discussing this within our group, and we're reluctant to release
>>>> power traces, because those are very specific to the particular
>>>> configuration from which they were obtained.
>>> I wanted to compare peak temperatures of two floorplans, so the underlying
>>> configuration/architecture does not seem to be much of importantance.
>>>
>>>> In particular, adapting a power trace obtained from a 2D config for use
>>>> with a 3D organization seems risky.
>>>>
>>> What do you mean by a 2D config? I was planning to use power values from
>>> sim-wattch with default configuration -if I can handle the correspondence of
>>> values with blocks in floorplan. Should I also tweak the simulator to make
>>> it 3D?
>>>
>>>> --Kevin
>>>>
>>>> Mehmet Kayaalp wrote:
>>>>
>>>>> Hello,
>>>>>
>>>>> I want to use HotSpot to examine the effect of the floorplanning in 3D
>>>>> stacking. However I understand that generating power traces requires a
>>>>> non-trivial effort. Is it possible for you to share the power traces for a
>>>>> benchmark suite like the sample one provided for gcc, but for many
>>>>> benchmarks and for a longer run (like a billion instructions)? And also a
>>>>> corresponding floorplan?
>>>>>
>>>>> Thanks in advance.
>>>>>
>>>>> Mehmet Kayaalp
>>>>> Department of Computer Engineering
>>>>> TOBB University of Economics and Technology, Turkey
>>>>>
>>>>>
>>>>> ------------------------------------------------------------------------
>>>>>
>>>>> _______________________________________________
>>>>> HotSpot mailing list
>>>>> HotSpot at mail.cs.virginia.edu
>>>>> http://www.cs.virginia.edu/mailman/listinfo/hotspot
>>>>>
>>>>
>>>>
>>>>
>>>>
>>>>
>>>>
>>
>>
>> !DSPAM:3101,4b087c35709126662971!
>>
>>
> 
> _______________________________________________
> HotSpot mailing list
> HotSpot at mail.cs.virginia.edu
> http://www.cs.virginia.edu/mailman/listinfo/hotspot

From fargh232 at student.liu.se  Sun Nov 29 13:23:36 2009
From: fargh232 at student.liu.se (Farrokh Ghani Zadegan)
Date: Sun, 29 Nov 2009 22:23:36 +0100
Subject: [Hotspot] (no subject)
Message-ID: <001801ca713a$377a1530$a66e3f90$@liu.se>

Hi,

 

I used the "hotspotUI.xls" file- available in HotSpot-4.2 package, to study
the cycles it takes different units of the chip to cool down to the ambient
temperature (after getting to a certain temperature- say 363.15 Kelvin). I
added 9000 lines of zero power values (I thought it were enough!) in the
PTRACE worksheet and also modified the following settings in the CONFIG
worksheet:

 

Ambient temperature in kelvin:                0              (Yes, absolute
zero)

Initial temperature (kelvin) if not from file:          363.15

Model Type:      Grid

 

I kept the other settings intact. After running HotSpot, the lowest
temperature (among all the units) in the TTRACE worksheet was 89.27 degrees
Celsius which is 362.42 Kelvin. This result just doesn't seem all right. Am
I doing anything wrong in this experiment?

 

Regards,

Farrokh

 

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From fargh232 at student.liu.se  Sun Nov 29 14:15:23 2009
From: fargh232 at student.liu.se (Farrokh Ghani Zadegan)
Date: Sun, 29 Nov 2009 23:15:23 +0100
Subject: [Hotspot] Cooling Experiment
Message-ID: <003601ca7141$7284a8f0$578dfad0$@liu.se>

Hi,

I used the "hotspotUI.xls" file- available in HotSpot-4.2 package, to study
the cycles it takes different units of the chip to cool down to the ambient
temperature (after getting to a certain temperature- say 363.15 Kelvin). I
added 9000 lines of zero power values (I thought it were enough!) in the
PTRACE worksheet and also modified the following settings in the CONFIG
worksheet:

Ambient temperature in kelvin:??????????????? 0????????????? (Yes, absolute
zero)
Initial temperature (kelvin) if not from file:????????? 363.15
Model Type: ???? Grid

I kept the other settings intact. After running HotSpot, the lowest
temperature (among all the units) in the TTRACE worksheet was 89.27 degrees
Celsius which is 362.42 Kelvin. This result just doesn't seem all right. Am
I doing anything wrong in this experiment?

Regards,
Farrokh





From skadron at cs.virginia.edu  Sun Nov 29 17:29:41 2009
From: skadron at cs.virginia.edu (Kevin Skadron)
Date: Sun, 29 Nov 2009 20:29:41 -0500
Subject: [Hotspot] Cooling Experiment
In-Reply-To: <003601ca7141$7284a8f0$578dfad0$@liu.se>
References: <003601ca7141$7284a8f0$578dfad0$@liu.se>
Message-ID: <4B132005.8080705@cs.virginia.edu>

Can you send us your spreadsheet?
/K

Farrokh Ghani Zadegan wrote:
> Hi,
> 
> I used the "hotspotUI.xls" file- available in HotSpot-4.2 package, to study
> the cycles it takes different units of the chip to cool down to the ambient
> temperature (after getting to a certain temperature- say 363.15 Kelvin). I
> added 9000 lines of zero power values (I thought it were enough!) in the
> PTRACE worksheet and also modified the following settings in the CONFIG
> worksheet:
> 
> Ambient temperature in kelvin:                0              (Yes, absolute
> zero)
> Initial temperature (kelvin) if not from file:          363.15
> Model Type:      Grid
> 
> I kept the other settings intact. After running HotSpot, the lowest
> temperature (among all the units) in the TTRACE worksheet was 89.27 degrees
> Celsius which is 362.42 Kelvin. This result just doesn't seem all right. Am
> I doing anything wrong in this experiment?
> 
> Regards,
> Farrokh
> 
> 
> 
> 
> _______________________________________________
> HotSpot mailing list
> HotSpot at mail.cs.virginia.edu
> http://www.cs.virginia.edu/mailman/listinfo/hotspot

From ks4kk at virginia.edu  Sun Nov 29 22:46:04 2009
From: ks4kk at virginia.edu (Karthik Sankaranarayanan)
Date: Sun, 29 Nov 2009 22:46:04 -0800
Subject: [Hotspot] Cooling Experiment
In-Reply-To: <003601ca7141$7284a8f0$578dfad0$@liu.se>
References: <003601ca7141$7284a8f0$578dfad0$@liu.se>
Message-ID: <eae341010911292246o2eb25a0dlffc0c067acb87cb9@mail.gmail.com>

Hi Farrokh,

What is the sampling interval you use? If you used the default value of
3.33us, then 9000 lines is just 30 ms. The time constant of the combined
cooling system (including heatsink) is in the order of minutes. So, 30 ms is
too little a time for the system to cool down. There are two potential
directions:
1) You could either try a much larger sampling interval or
2) You could set the initial heatsink/spreader temperatures to be close to
the ambient (since the time constant of silicon is in the order of us/ms,
cooling of silicon alone would only take a few ms)

Hope this helps. Please let us know what you find.

Thanks,
-karthik

2009/11/29 Farrokh Ghani Zadegan <fargh232 at student.liu.se>

> Hi,
>
> I used the "hotspotUI.xls" file- available in HotSpot-4.2 package, to study
> the cycles it takes different units of the chip to cool down to the ambient
> temperature (after getting to a certain temperature- say 363.15 Kelvin). I
> added 9000 lines of zero power values (I thought it were enough!) in the
> PTRACE worksheet and also modified the following settings in the CONFIG
> worksheet:
>
> Ambient temperature in kelvin:                0              (Yes, absolute
> zero)
> Initial temperature (kelvin) if not from file:          363.15
> Model Type:      Grid
>
> I kept the other settings intact. After running HotSpot, the lowest
> temperature (among all the units) in the TTRACE worksheet was 89.27 degrees
> Celsius which is 362.42 Kelvin. This result just doesn't seem all right. Am
> I doing anything wrong in this experiment?
>
> Regards,
> Farrokh
>
>
>
>
> _______________________________________________
> HotSpot mailing list
> HotSpot at mail.cs.virginia.edu
> http://www.cs.virginia.edu/mailman/listinfo/hotspot
>
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From wh6p at virginia.edu  Mon Nov 30 09:49:33 2009
From: wh6p at virginia.edu (Wei Huang)
Date: Mon, 30 Nov 2009 12:49:33 -0500
Subject: [Hotspot] [Fwd: An error in the paper "Temperature-Aware
 Microarchitecture: Extended Discussion and Results"]
In-Reply-To: <web-7669375@tetra.mail.virginia.edu>
References: <4B132115.9000406@cs.virginia.edu>
	<web-7669375@tetra.mail.virginia.edu>
Message-ID: <web-8564230@guppy.mail.virginia.edu>

Ing-Chao,

This is indeed a typo in the paper. It should be A*s/V. Great to know you 
are interested in the paper and thank you for pointing out the error.

-Wei

>> -------- Original Message --------
>> Subject: An error in the paper "Temperature-Aware Microarchitecture: 
>>Extended 	Discussion and Results"
>> Date: Sat, 28 Nov 2009 15:26:05 +0800
>>From: Ing-Chao Lin <iclin at csie.ncku.edu.tw>
>> To: skadron at cs.virginia.edu
>> CC: iva at cs.virginia.edu, karthick at cs.virginia.edu, dtarjan at cs.virginia.edu
>> 
>> Hi Kevin,
>> 
>> The report "Temperature-Aware Microarchitecture: Extended Discussion
>> and Results" is a great article. After reading the article, I would
>> like to let you know the table 1 has an minor error.
>> 
>> The electrical capacitance  F is equal to  Coulomb/V or As/V not just A/V.
>> 
>> Hope it help.
>> 
>> Regards,
>> Ing-Chao
> 


From fargh232 at student.liu.se  Mon Nov 30 10:22:22 2009
From: fargh232 at student.liu.se (Farrokh Ghani Zadegan)
Date: Mon, 30 Nov 2009 19:22:22 +0100
Subject: [Hotspot] Cooling Experiment
In-Reply-To: <eae341010911292246o2eb25a0dlffc0c067acb87cb9@mail.gmail.com>
References: <003601ca7141$7284a8f0$578dfad0$@liu.se>
	<eae341010911292246o2eb25a0dlffc0c067acb87cb9@mail.gmail.com>
Message-ID: <003001ca71ea$1018d7f0$304a87d0$@liu.se>

Hi,

 

Thank you for the reply. I guess I'll work on the first direction, because
what you have suggested as the second direction- as far as I have learned so
far, is done by the HotSpot itself when the initial temperature is supplied
as a single value and not as an initialization file.

 

Regards,

Farrokh

 

From: Karthik Sankaranarayanan [mailto:ks4kk at virginia.edu] 
Sent: Monday, November 30, 2009 07:46
To: Farrokh Ghani Zadegan
Cc: hotspot at mail.cs.virginia.edu
Subject: Re: [Hotspot] Cooling Experiment

 

Hi Farrokh,

What is the sampling interval you use? If you used the default value of
3.33us, then 9000 lines is just 30 ms. The time constant of the combined
cooling system (including heatsink) is in the order of minutes. So, 30 ms is
too little a time for the system to cool down. There are two potential
directions: 
1) You could either try a much larger sampling interval or 
2) You could set the initial heatsink/spreader temperatures to be close to
the ambient (since the time constant of silicon is in the order of us/ms,
cooling of silicon alone would only take a few ms)

Hope this helps. Please let us know what you find.

Thanks,
-karthik

2009/11/29 Farrokh Ghani Zadegan <fargh232 at student.liu.se>

Hi,

I used the "hotspotUI.xls" file- available in HotSpot-4.2 package, to study
the cycles it takes different units of the chip to cool down to the ambient
temperature (after getting to a certain temperature- say 363.15 Kelvin). I
added 9000 lines of zero power values (I thought it were enough!) in the
PTRACE worksheet and also modified the following settings in the CONFIG
worksheet:

Ambient temperature in kelvin:                0              (Yes, absolute
zero)
Initial temperature (kelvin) if not from file:          363.15
Model Type:      Grid

I kept the other settings intact. After running HotSpot, the lowest
temperature (among all the units) in the TTRACE worksheet was 89.27 degrees
Celsius which is 362.42 Kelvin. This result just doesn't seem all right. Am
I doing anything wrong in this experiment?

Regards,
Farrokh




_______________________________________________
HotSpot mailing list
HotSpot at mail.cs.virginia.edu
http://www.cs.virginia.edu/mailman/listinfo/hotspot

 

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