> 33 MHz cycles (8 for the transfer and n for latency), then
> the bandwidth is
> 53.3 MB/s = 64 bytes/(n+8 cycles) * 33 Million cycles/sec
> which implies a latency of about n=32 cycles.
> For the 720
> 43.6 MB/s = 64 bytes/(n+8 cycles) * 25 Million cycles/sec
> which implies a latency of about n=29 cycles.
> Both of these numbers seem unreasonably high.
> Am I completely misunderstanding the way the memory system on the
> HP works?
Sorry, I just write software.... I'm lucky if I get to see "how fast it runs"
on a 700 machine (it's amazingly fast for our applications).
I'll forward your comments to someone who may havea better answer.
-- --- John R. Lupien firstname.lastname@example.org
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