> It is interesting to note that no performance advantage is gained by
> using 32-bit arithmetic. The halved bandwidth corresponds to identical
> computational rates. This is in complete agreement with my model
> timing as well.
The 32-bit arithmetic (addressing?) in the SX-3 is interesting. Your
data shows no speed-up in 32-bit, I presume this is because the
functional units still only has 64-bit paths. Are 32-bit results
simply truncated 64-bit results? Is the way the RS/6000 works?
NEC has recently announced the "SX-3 R" series. It has up to 1 (or 2?)
Gwords of memory. Do you know if the memory on the SX-3 is byte
addressable? If it is, and the address paths and registers are 32-bit,
was this changed in order to address 1 Gword on the SX-3 R?
Thanks and regards,
-- Charles Grassl Cray Research, Inc. (612) 683-3531 firstname.lastname@example.org
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