Part a
32 KB Cache with 8 bytes/line
total lines in cache = 32768 B / (8 (bytes/line)
total number of lines = 4096
Part b
Main memory 16 MB --- requires 24-bit address (16 MB = 2^24 bytes)
Group Field ===> 2^(groupfield bits) = 4096 (lines in cache)
group field = 12 bits
Byte Field ===> 8 bytes/line
===> 2^(byte_field bits) = 8 bytes
===> 3 bits
Tag Field ===> Total - (Group Field + Byte Field)
===> 24 - (12+3) = 9
| Tag -- 9 Bits | Line Number -- 12 Bits | Byte Number -- 3 Bits |
Question 2
Effective access time = percentage occcurence* hit access time + percentage occurence * miss access time
Effective access time = .95 (100 ns) + .05 (800 ns)
Effective access time = 135 ns
Question 3
Part A
2^32 bytes of memory => 32-bit memory address
16 byte blocks => 4-bit byte field
2K = 2048 cache lines
2048 lines * 16 bytes/line = 32768 bytes = 32 K cache
Associative Cache
Tag Field = mem. address length - byte field = 32-4 = 28 bits
Validity Bits = 1
Data Field = 16 bytes = 128 bits
Total bits = (tag + validity + data bits) * total # of lines
Total bits = (28+1+128)*2^11 = 157*2^11
Direct-Mapped Cache
Group field => 2048 lines = 2^11 lines = 2^11 groups
==> 11 bits
Byte field, validity bit, and data fields all the same as in associative cache above
Tag = 32 - (Group + byte) = 32 - (11+4)
Tag = 17 bits
Total Bits = (tag + validity + data bits) * total # of lines
Total Bits = (17+1+128)*2^11 = 146*2^11
Part B
Associative Cache
| Tag -- 28 bits | Byte Number -- 4 bits |
Direct-Mapped Cache
| Tag -- 17 bits | Line Number -- 11 bits | Byte Number -- 4 bits |
Question 4
Some reasons for better performance with caches with longer cache lines....
1) Locality of reference - when you reference "something" from memory it is likely you will in the future reference other things located in memory near that original "something" - with larger blocks, you pick up a larger chunk of memory; therefore, this property is exploited (prevents repetitive swaps to memory when referencing one specific part of memory because you have already loaded that one large part into the cache); smaller cache lines don't let you exploit this
2) Longer cache lines imply fewer lines of cache. For a fully
associative cache, this reduces the number of lines to be searched, perhaps
allowing
for faster hardware. For a direct mapped cache, fewer lines implies
a smaller group field that needs to be decoded.
3) For large data representations, like arrays, temporal locality can be exploited. If a large array is stored, it's likely if one array value is used, the others will soon be necessary. Instead of constantly swapping blocks in and out of memory, grabbing one large block will likely grab most, if not all, of the array values to be used in the future.
4) Page mode memories provide for faster access for large blocks of data.