CS 3330: Undergraduate Computer Architecture

Lecture Time/Location: Mo/We 2pm-3:15pm @ Olsson 120
Lab-1 Time/Location: We 5pm-6:15pm @ Olsson 011
Lab-2 Time/Location: We 6:30pm-7:45pm @ Olsson 011
The goal of this course is to introduce students to the hardware/software interface and the fundamental building blocks that make up a modern computer. By taking this course, students will:
  • become conversant with fundamental computer architecture concepts,
  • be able to read and evaluate specs of modern architectures,
  • understand the implications of computer architecture on performance and security, and
  • gain experience designing a working processor from scratch.
Required Textbook:
    Patterson and Hennessy, "Computer Organization and Design: The Hardware/Software Interface", Fifth Edition
Other textbooks and online resources:


We will use Piazza as our class forum, and our primary mode of communication outside of class. All general inquiries must be made on Piazza. For group-specific questions or private questions, you can either email me or post a private question on Piazza.

    Ishika Paul (email: ip2ba@virginia.edu)
    Office Hours: Tu/Th 2pm-3pm @ Rice 442, or by appointment.
Teaching Assistants:


The grading breakdown for this course is:

  • 5%: Class Participation and Professionalism
  • 20%: 5 homework assignments
  • 15%: Lab Project-1 (Feb 5 to Apr 8)
  • 10%: Lab Project-2 (Apr 15 to Apr 29)
  • 10%: Midterm exam-1 on Feb 24 (will include material from Jan 13 to Feb 5)
  • 15%: Midterm exam-2 on Apr 6 (will include material from Feb 10 to Mar 23)
  • 25%: Final exam on May 7 from 2pm-5pm (inclusive of all material)
We will NOT use an absolute grading scale for this course. Your final letter grades will be assigned based on your overall performance, relative to the class average. In addition, you will receive an automatic level-up in your letter grade (e.g., A- to A) if you ace the final. Scores and standings will be periodically updated on Gradesource.


There will be 5 homework assignments (due roughly every two weeks). Each homework assignment will involve 5-6 exercise problems from the textbook. Links to assignments:

There will also be 2 lab projects that will involve building a processor and a cache side-channel exploit from scratch. More details to follow soon.
Guidelines and Policies:
  • You will work in pairs for all assignments (including the lab projects) and both students will receive the same grade.
  • Homework assignments are to be turned in electronically on Gradescope, at the beginning of the lecture, unless otherwise noted.
  • You are strongly encouraged to typeset your homework solutions, but not strictly required.
  • Homework assignments are primarily intended for practice, rather than assessment. No single problem will have a significant impact on your final grade.
  • Solutions to homework assignments will be typically released 2 days after the assignment is due.
  • Late assignments are not encouraged. Late assignments turned in before solutions are posted will be assessed a flat 10% (of the maximum score) late penalty. If you turn in the assignment after the solutions have been posted, it will not be accepted.


Date Topic Assignment Lab/Discussion
Jan 13 Introduction, Motivation, and Course Logistics
Background Preparation: Appendix A
Reading: Chapter 1.3
- -
Jan 15 Instruction Set Architecture
Reading: Chapters 2.2, 2.3, 2.5
HW1 out Discussion: ISA
Jan 20 Martin Luther King Jr. Day - -
Jan 22 Memory Organization and Control Flow
Reading: Chapters 2.6, 2.7, 2.8
- Discussion: ISA
Jan 27 Quantitative Analysis in Computer Architecture
Reading: Chapters 1.6 and 1.10
- -
Jan 29 Design of the MIPS Arithmetic and Logic Unit
Reading: Appendix B.2, B.3, and B.5
- Discussion: Performance/Digital Logic
Feb 3 Design of the Control Unit and Register File
Reading: Appendix B.7, B.8, and Chapter 4.3
HW1 due, HW2 out -
Feb 5 The MIPS Single Cycle Processor Architecture
Reading: Chapter 4.3 and 4.4
Project-1 out Discussion: Sequential Logic
Lab: Introduction to Project-1
Feb 10 Pipelining Fundamentals
Reading: Chapter 4.5
- -
Feb 12 Pipelined Datapath and Control
Reading: Chapter 4.6
- Discussion: Single-Cycle Processor
Feb 17 Pipelining: Hazard Detection and Forwarding
Reading: Chapter 4.7
HW2 due, HW3 out -
Feb 19 Midterm Exam-1 Review - Discussion: TA Midterm Review
Feb 24 Midterm Exam-1 [Solutions] - -
Feb 26 Pipelining: Control Hazards
Reading: Chapter 4.8
- Discussion: Pipelining
Mar 2 Branch Prediction
Reading: Chapter 4.8
- -
Mar 4 Speculative Execution and Superscalar Processors
Reading: Chapter 4.10
HW3 due, HW4 out Discussion: Branch Prediction
Mar 9 Spring Break - -
Mar 11 Spring Break - -
Mar 16 Classes Canceled University-Wide due to COVID-19 - -
Mar 18 Classes Canceled University-Wide due to COVID-19 - -
Mar 23 Superscalars and Static Scheduling
Reading: Chapter 4.10
- -
Mar 25 Dynamic Scheduling and Evolution of the Modern Microprocessor
Reading: Chapter 4.11
- Discussion: OOO Processors
Mar 30 Introduction to the Memory Hierarchy: Cache Fundamentals
Reading: Chapter 5.1 and 5.2
HW4 due -
Apr 1 Midterm Exam-2 Review - Discussion: TA Midterm Review
Apr 6 Midterm Exam-2 [Solutions] - -
Apr 8 Cache Fundamentals
Reading: Chapter 5.3
Project-1 due TA Interview: Project-1
Discussion: Cache Organization
Apr 13 Cache Organization and Design
Reading: Chapter 5.4
- -
Apr 15 Cache Management and Policies
Reading: Chapter 5.8
- Discussion: Cache Management
Apr 20 Primer on Cache Side-Channel Attacks
Chapters 8.1-8.5 from Principles of Secure Processor Architecture Design
Project-2, HW5 out (due May 4) -
Apr 22 Cache Optimizations
Reading: Chapter 5.14
- Discussion: Cache Side-Channel Attacks
Lab: Introduction to Project-2
Apr 27 Virtual Memory
Reading: Chapter 5.7
- -

Honor Code

I trust every student in this course to fully abide by the University's Honor Code and pledge to not commit academic fraud. You are allowed to discuss, collaborate, and brainstorm both within and outside your group. However, you're not allowed to plagiarize solutions/text from another student's assignment or from the internet. Cheating will be taken seriously and will be reported to the honor committee. All suspected honor violations will receive an immediate zero on that assignment regardless of any action taken by the Honor Committee.

    Please let me know if you have any questions regarding the course Honor policy. If you believe you may have committed an Honor Offense, you may wish to file a Conscientious Retraction by calling the Honor Offices at (434) 924-7602. For your retraction to be considered valid, it must, among other things, be filed with the Honor Committee before you are aware that the act in question has come under suspicion by anyone. More information can be found here. Your Honor representatives can be found at this link

    Learning Accommodations

    Students with disabilities or learning needs
    It is my goal to create a learning experience that is as accessible as possible. If you anticipate any issues related to the format, materials, or requirements of this course, please meet with me outside of class so we can explore potential options. Students with disabilities may also wish to work with the Student Disability Access Center to discuss a range of options to removing barriers in this course, including official accommodations. Please visit their website for information on this process and to apply for services online. If you have already been approved for accommodations through SDAC, please send me your accommodation letter and meet with me so we can develop an implementation plan together.

    Discrimination and power-based violence
    The University of Virginia is dedicated to providing a safe and equitable learning environment for all students. To that end, it is vital that you know two values that I and the University hold as critically important:
    1. Power-based personal violence will not be tolerated.
    2. Everyone has a responsibility to do their part to maintain a safe community on Grounds.
    If you or someone you know has been affected by power-based personal violence, more information can be found on the UVA Sexual Violence website that describes reporting options and resources available.
      As your professor and as a person, know that I care about you and your well-being and stand ready to provide support and resources as I can. As a faculty member, I am a responsible employee, which means that I am required by University policy and federal law to report what you tell me to the University's Title IX Coordinator. The Title IX Coordinator's job is to ensure that the reporting student receives the resources and support that they need, while also reviewing the information presented to determine whether further action is necessary to ensure survivor safety and the safety of the University community. If you wish to report something that you have seen, you can do so at the Just Report It portal. The worst possible situation would be for you or your friend to remain silent when there are so many here willing and able to help.

      Religious accommodations
      It is the University's long-standing policy and practice to reasonably accommodate students so that they do not experience an adverse academic consequence when sincerely held religious beliefs or observances conflict with academic requirements. Students who wish to request academic accommodation for a religious observance should submit their request in writing directly to me as far in advance as possible. Students who have questions or concerns about academic accommodations for religious observance or religious beliefs may contact the University’s Office for Equal Opportunity and Civil Rights (EOCR) at UVAEOCR@virginia.edu or (434) 924-3200.