Bruce's CFP Publications

Updated 10/06/99

B. Childers and J. Davidson, "An infrastructure for designing custom embedded counterflow pipelines", Hawaii Int'l. Conf. on System Sciences, Maui, Hawaii, January 3-7, 2000.
B. Childers and J. Davidson, "Automatic architectural design of wide-issue counterflow pipelines", Workshop on Compiler and Architecture Support for Embedded Systems, Washington, DC, October 1-3, 1999.
B. Childers and J. Davidson, "Rapid Prototyping of Application-Specific Counterflow Pipelines", journal submission in preparation, February 1999. A lightweight version of this appears in the technical report below. Alas, it does not go into the detail of this report.
B. Childers and J. Davidson, "Rapid Prototyping of Application-Specific Counterflow Pipelines", January 1999. UVA CS Technical Report CS-99-01.
B. Childers and J. Davidson, "Automatic Design of Custom Wide-Issue Counterflow Pipelines", submitted for publication, January 1999. Available as UVA CS Technical Report CS-99-02.
B. Childers and J. Davidson, "Architectural Considerations for Application-Specific Counterflow Pipelines", to appear in IEEE 20th Anniversary Conf. on Advanced Research in VLSI, Atlanta, Georgia, March 1999.
B. Childers and J. Davidson, "Application-Specific Pipelines for Exploiting Instruction-Level Parallelism", University of Virginia, Technical Report No. CS-98-14, May 1, 1998.
B. Childers and J. Davidson, "A Design Environment for Counterflow Pipeline Synthesis", Workshop on Languages, Compilers, and Tools for Embedded Systems (LCTES '98), during PLDI '98, Montreal, Canada, June 19-20, 1998.
B. Childers and J. Davidson, "A Design Environment for Counterflow Pipeline Synthesis", University of Virginia, Technical Report No. CS-98-05, March 1998.
B. Childers and J. Davidson, "Automatic Counterflow Pipeline Synthesis", University of Virginia, Technical Report No. CS-98-01, January 1998.
B.R. Childers, J. W. Davidson, and W. A. Wulf, "Synthesis of Application-Specific Counterflow pipelines", Workshop on the Interaction between Compilers and Computer Architecture (INTERACT-1), during 2nd Int'l Symp. on High Performance Computer Architecture, San Jose, Ca., February 3-7, 1996. Slides are available here.
M. Alexander, M. Bailey, B. Childers, J. Davidson, and S. Jinturkar, "Memory Bandwidth Optimization for Wide-Bus Machines", Proc. of the 26th Annual Hawaii Int'l Conf. on System Sciences, 1(1): 466-475, Wailea, Hawaii, January 1993.

Last modified: Sun Feb 20 14:02:57 2000