D. Tarjan and K. Skadron
In Univ. of Virginia Dept. of Computer Science Tech. Report CS-2004-28, Sept 2004
Abstract
We introduce a new kind of branch predictor, the hashed perceptron predictor,
which merges the concepts behind the gshare and perceptron branch predictors.
This is done by fetching the perceptron weights using the exclusive-or of branch addresses and branch history.
This predictor can achieve superior accuracy to a path-based and a global perceptron predictor, previously the
most accurate fully dynamic branch predictors known in the literature, at the same storage budgets. Additionally,
it reduces the number of adders by a factor of four compared to a path-based perceptron. We also show how such
a predictor can be ahead pipelined to yield one cycle effective latency, making it the first standalone perceptron predictor.
On the SPEC integer set of benchmarks, the hashed ahead-pipelined path-based perceptron predictor (hashed
perceptron for short) improves accuracy by 20% over a path-based perceptron and improves IPC by 5.8%.
We believe these improvements make the perceptron predictor a promising choice as a branch predictor for a future high-performance microprocessor.
The 1st Championship Branch Prediction produced a bunch of interesting papers using perceptrons, building upon the older work.
Anybody have any additional suggestions? Comments?