Future Chip Multiprocessors won't just have to contend with the of long latency of 
main memory access and with keeping the power budget of the processor in check, 
but will also face bandwidth limitations because pin-bandwidth and the number of 
pins won't be able to keep up with the growth in the number of processor cores. 
Optical interconnects have been proposed as a method to ease this future bandwidth 
bottleneck. Here we calculate the bandwidth offered by future electrical and optical 
interconnects based on the SIA roadmap and conservative extrapolation of the ca- 
pabilities offered by array's of VCSEL's in the given timeframe 2008-2014. We run 
programs from the Spec2000 and Mediabench suites on an execution-driven simu- 
lator showing that programs which are strongly dependent on memory bandwidth 
can take advantage of an optical interconnect and see increases in performance of 
up to 340%.