Sudhanva Gurumurthi

Visiting Professor
Department of Computer Science
University of Virginia


Senior Researcher
AMD


Curriculum Vitae: PDF  (Last Updated: August 2014)
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Research Interests

My research interests are in the field of computer architecture. The focus areas of my research are:
  • Resiliency and reliability of processors, the memory hierarchy, and data center infrastructures
  • Design and evaluation of architectures using non-volatile memory technologies
  • Energy-efficient design and management of storage systems
  • Performance, power, and reliability modeling and evaluation methodologies


    Selected Awards/Honors (See CV for Full List of Awards and Honors)

  • AMD Innovation Fund Award, 2014
  • ACM Senior Member, 2011
  • IEEE Senior Member, 2010
  • Google Focused Research Award - 2010
  • Google Faculty Research Award - 2007, 2009
  • NSF CAREER Award, 2007


    Selected Press Articles (Click Here for Full List of Press Articles)

  • Slashdot, November 2013
  • Dr. Dobb's Journal, February 2010
  • NSF Highlight to the United States Congress, May 2009
  • Google Research Blog, January 2009


    Book

    M. Qureshi, S. Gurumurthi, B. Rajendran, Phase Change Memory: From Devices to Systems, Synthesis Lectures on Computer Architecture, Morgan and Claypool Publishers, December 2011. (Click Here to buy it on Amazon)


    Selected Recent Publications (Click Here for Full List of Publications)
    Google Scholar Citation Profile: Click Here

    Please note that papers linked here represent author preprints. The official, published version must be obtained from the publisher's website or the published print copy. This material is presented here to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each document's copyright terms. In most cases, these works may not be reposted without the explicit permission of the copyright holder. Permission is given to make digital or hard copies of all or part of this material without fee for personal or classroom use, provided that the copies are not made or distributed for profit or commercial advantage, and that copies bear the appropriate copyright notice and the full bibliographic citation on the first page. Copyrights for components of this work owned by others must also be honored. To copy otherwise, to republish, to post on servers, to redistribute to lists, etc. requires specific permission and/or a fee. In particular, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works, must be obtained from the copyright owner.

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  • Calculating Architectural Vulnerability Factors for Spatial Multi-Bit Transient Faults, MICRO 2014
  • Real-World Design and Evaluation of Compiler-Managed GPU Redundant Multithreading, ISCA 2014
  • GPU-Qin: A Methodology for Evaluating the Error Resilience of GPGPU Applications, ISPASS 2014
  • Soft Failures in Large Datacenters, IEEE CAL 2013
  • Feng Shui of Supercomputer Memory - Positional Effects in DRAM and SRAM Faults, SC 2013
  • Datacenter Scale Evaluation of the Impact of Temperature on Hard Disk Drive Failures, ACM Transactions on Storage 2013
  • Enhancing NBTI Recovery in SRAM Arrays through Recovery Boosting, IEEE Transactions on VLSI 2012
  • The STeTSiMS STT-RAM Simulation and Modeling System, ICCAD 2011
  • Delivering on the Promise of Universal Memory for Spin-Transfer Torque RAM (STT-RAM), ISLPED 2011
  • Relaxing Non-Volatility for Fast and Energy-Efficient STT-RAM Caches, HPCA 2011


    Selected Recent Professional Activities (Click Here for Full List of Activities)

  • SELSE 2015, Program Co-Chair
  • HPCA 2015, Industry Session Program Chair
  • IEEE Computer Architecture Letters, Associate Editor (2011-2014); Associate Editor-in-Chief (2010-2011)
  • HPCA 2014, Industry Session Program Committee Member
  • IEEE Micro Top Picks 2014, Selection Committee Member
  • HPCA 2013, Program Committee Member
  • NSF Workshop on Cross-Layer Power Optimization and Management, Invited Participant, February 2012
  • Phase Change Memory Tutorial, Co-Organizer (Presented HPCA 2010, MICRO 2010, NVMW 2011).


    Students (Click Here for Full List of Current and Previous Students)

    Current Graduate Advisees

  • Jack Wadden (Co-advised with Kevin Skadron)

    PhD Graduates

  • Sriram Sankar (May 2014)
    Dissertation:Impact of Data Center Infrastructure on Server Availability - Characterization, Management and Optimization
    MS Thesis:Intra-Disk Parallelism (August 2008)
    First Employment: Microsoft, Redmond, WA


  • Taniya Siddiqua (August 2012)
    Dissertation:A Multi-Level Approach to NBTI Mitigation in Processors
    MS Thesis: Balancing Soft Error Coverage with Lifetime Reliability in Redundantly Multithreaded Processors (September 2009)
    First Employment: Intel, Hudson, MA


  • Clinton Wills Smullen, IV (September 2011)
    Dissertation:Designing Giga-Scale Memory Systems with STT-RAM
    First Employment: Google, Mountain View, CA



    Teaching: Click Here for the List of Courses I have Taught




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