Sudhanva Gurumurthi

Principal Member of Technical Staff

Visiting Associate Professor
Department of Computer Science
University of Virginia

Curriculum Vitae: PDF  (Last Updated: July 2019)
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Research Interests

My research interests are in the fields of computer architecture and systems design. The areas in which I have worked on in academia and industry include:
  • Machine learning
  • Data center architecture and cloud computing
  • Resiliency and reliability of processors, the memory hierarchy, and data center infrastructures
  • Design and evaluation of architectures using non-volatile memory technologies
  • Energy-efficient design and management of storage systems
  • Performance, power, and reliability modeling and evaluation methodologies

    Selected Awards/Honors (See CV for Full List of Awards and Honors)

  • IBM Manager's Choice Award, 2015
  • AMD Innovation Fund Award, 2014
  • ACM Senior Member, 2011
  • IEEE Senior Member, 2010
  • Google Focused Research Award - 2010
  • Google Faculty Research Award - 2007, 2009
  • NSF CAREER Award, 2007

    Selected Press Articles (Click Here for Full List of Press Articles)

  • HPCwire, July 2015
  • ZDNet, May 2014
  • Slashdot, November 2013
  • Dr. Dobb's Journal, February 2010
  • NSF Highlight to the United States Congress, May 2009
  • Google Research Blog, January 2009


    M. Qureshi, S. Gurumurthi, B. Rajendran, Phase Change Memory: From Devices to Systems, Synthesis Lectures on Computer Architecture, Morgan and Claypool Publishers, December 2011. (Click Here to buy it on Amazon)

    Selected Publications (Click Here for Full List of Publications)
    Google Scholar Citation Profile: Click Here

    Please note that papers linked here represent author preprints. The official, published version must be obtained from the publisher's website or the published print copy. This material is presented here to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each document's copyright terms. In most cases, these works may not be reposted without the explicit permission of the copyright holder. Permission is given to make digital or hard copies of all or part of this material without fee for personal or classroom use, provided that the copies are not made or distributed for profit or commercial advantage, and that copies bear the appropriate copyright notice and the full bibliographic citation on the first page. Copyrights for components of this work owned by others must also be honored. To copy otherwise, to republish, to post on servers, to redistribute to lists, etc. requires specific permission and/or a fee. In particular, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works, must be obtained from the copyright owner.

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  • Kleio: a Hybrid Memory Page Scheduler with Machine Intelligence, HPDC 2019 (Nominated for Best Paper Award)
  • ePVF: An Enhanced Program Vulnerability Factor Methodology for Cross-Layer Resilience Analysis, DSN 2016
  • Memory Errors in Modern Systems: The Good, The Bad, and The Ugly, ASPLOS 2015
  • Calculating Architectural Vulnerability Factors for Spatial Multi-Bit Transient Faults, MICRO 2014
  • Real-World Design and Evaluation of Compiler-Managed GPU Redundant Multithreading, ISCA 2014
  • Feng Shui of Supercomputer Memory - Positional Effects in DRAM and SRAM Faults, SC 2013
  • Relaxing Non-Volatility for Fast and Energy-Efficient STT-RAM Caches, HPCA 2011
  • Intra-Disk Parallelism: An Idea Whose Time Has Come, ISCA 2008 (Selected to IEEE Micro Top Picks)
  • Dynamic Prediction of Architectural Vulnerability From Microarchitectural State, ISCA 2007
  • SlicK: Slice-Based Locality Exploitation for Efficient Redundant Multithreading, ASPLOS 2006
  • Understanding the Performance-Temperature Interactions in Disk I/O of Server Workloads, HPCA 2006
  • Disk Drive Roadmap from the Thermal Perspective: A Case for Dynamic Thermal Management, ISCA 2005
  • A Complexity-Effective Approach to ALU Bandwidth Enhancement for Instruction-Level Temporal Redundancy, ISCA 2004
  • ICR: In-Cache Replication for Enhancing Data Cache Reliability, DSN 2003
  • DRPM: Dynamic Speed Control for Power Management in Server Class Disks, ISCA 2003
  • Using Complete Machine Simulation for Software Power Estimation: The SoftWatt Approach, HPCA 2002
  • Analyzing Energy Behavior of Spatial Access Methods for Memory-Resident Data, VLDB 2001 (Selected to VLDB Journal - Best Papers of VLDB 2001)

    Selected Recent Professional Activities (See CV for Full List of Professional Activities)

  • ICPP 2020, Program Co-Chair - Architecture Track
  • MICRO 2019, Program Committee Member
  • ASPLOS 2017, Program Committee Member
  • SELSE, Program Co-Chair (2015-2016)
  • HPCA 2015, Industry Track Program Chair

    Students (Click Here for Full List of Current and Previous Students)

    PhD Graduates

  • Sriram Sankar (May 2014)
    Dissertation:Impact of Data Center Infrastructure on Server Availability - Characterization, Management and Optimization
    MS Thesis:Intra-Disk Parallelism (August 2008)
    First Employment: Microsoft, Redmond, WA

  • Taniya Siddiqua (August 2012)
    Dissertation:A Multi-Level Approach to NBTI Mitigation in Processors
    MS Thesis: Balancing Soft Error Coverage with Lifetime Reliability in Redundantly Multithreaded Processors (September 2009)
    First Employment: Intel, Hudson, MA

  • Clinton Wills Smullen, IV (September 2011)
    Dissertation:Designing Giga-Scale Memory Systems with STT-RAM
    First Employment: Google, Mountain View, CA

    Teaching: Click Here for the List of Courses I have Taught

    Page maintained by: Sudhanva Gurumurthi