Sudhanva Gurumurthi
Associate Professor
Department of Computer Science
University of Virginia
Research Interest:
Computer Architecture
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Mailing Address |
Department of Computer Science
University of Virginia
P.O. Box 400740
Charlottesville, VA 22904-4740
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Address for Express Mail |
Department of Computer Science
University of Virginia
85 Engineer's Way
Charlottesville, VA 22904
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| Office Location |
308 Rice Hall |
| Office Phone |
(434) 982-2227 |
| Fax |
(434) 982-2214
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| E-Mail |
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Curriculum Vitae:
PDF
(Last Updated: January 2012)
Current Research Projects
(Click On the Links Below for More Details about Each Project)
Non-Volatile Memory
Microprocessor Reliability
Energy-Efficient Storage
My research is supported by grants from the
National Science Foundation,
Intel,
HP, and Google.
Current Graduate Advisees
Taniya Siddiqua
MS Thesis:
Balancing Soft Error Coverage with Lifetime Reliability in Redundantly Multithreaded Processors (September 2009)
Vidyabhushan Mohan
MS Thesis:
Modeling the Physical Characteristics of NAND Flash Memory (May 2010)
Sriram Sankar
MS Thesis:Intra-Disk Parallelism (August 2008)
Luyao Jiang
PhD Graduates
Clinton Wills Smullen, IV (December 2011)
Dissertation:Designing Giga-Scale Memory Systems with STT-RAM
First Employment: Google, Mountain View, CA
ACM Senior Member, 2011
IEEE Senior Member, 2010
Google Focused Research Award - 2010
Google Faculty Research Award - 2007, 2009
NSF CAREER Award, 2007
MIT Technology Review,
June 13, 2011
C-Ville Weekly,
April 20, 2010
Dr. Dobb's Journal,
February 4, 2010
NSF Highlight to the United States Congress,
May 7, 2009
Google Research Blog,
January 28, 2009
Please note that papers linked here represent author preprints.
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Phase Change Memory: From Devices to Systems,
Synthesis Lectures on Computer Architecture 2011 (Book)
(Amazon Site)
The STeTSiMS STT-RAM Simulation and Modeling System,
ICCAD 2011
Delivering on the Promise of Universal Memory for Spin-Transfer Torque RAM (STT-RAM),
ISLPED 2011
Enhancing NBTI Recovery in SRAM Arrays through Recovery Boosting,
IEEE Transactions on VLSI 2011
Modeling and Analyzing NBTI in the Presence of Process Variation,
ISQED 2011
Relaxing Non-Volatility for Fast and Energy-Efficient STT-RAM Caches,
HPCA 2011
Accelerating Enterprise Solid-State Disks with Non-Volatile Merge Caching,
IGCC 2010
How I Learned to Stop Worrying and Love Flash Endurance,
HotStorage 2010
A Multi-Level Approach to Reduce the Impact of NBTI on Processor Functional Units,
GLSVLSI 2010
FlashPower: A Detailed Power Model for NAND Flash Memory,
DATE 2010
Architecting Storage for the Cloud Computing Era,
IEEE Micro 2009 (Invited Paper)
Using Intradisk Parallelism to Build Energy-Efficient Storage Systems,
IEEE Micro Top Picks 2009
Intra-Disk Parallelism: An Idea Whose Time Has Come,
ISCA 2008
Dynamic Prediction of Architectural Vulnerability from Microarchitectural State,
ISCA 2007
SODA: Sensitivity Based Optimization of Disk Architecture,
DAC 2007
(Detailed IEEE Transactions Version)
SlicK: Slice-Based Locality Exploitation for Efficient Redundant Multithreading,
ASPLOS 2006
Understanding the Performance-Temperature Interactions in Disk I/O of Server Workloads,
HPCA 2006
Disk Drive Roadmap from the Thermal Perspective: A Case for Dynamic Thermal Management,
ISCA 2005
A Complexity-Effective Approach to ALU Bandwidth Enhancement for Instruction-Level Temporal Redundancy,
ISCA 2004
DRPM: Dynamic Speed Control for Power Management in Server Class Disks,
ISCA 2003
ICR: In-Cache Replication for Enhancing Data Cache Reliability,
DSN 2003
Using Complete Machine Simulation for Software Power Estimation: The SoftWatt Approach,
HPCA 2002
Analyzing Energy Behavior of Spatial Access Methods for Memory-Resident Data,
VLDB 2001
)
The Storage Stack of Future Data Centers,
Panel slides from the ACLD Workshop (held in conjunction with ISCA), Saint-Malo, France,
June 2010.
Efficient Soft Error Protection for Microprocessors,
HP R&D Research Seminar - Computer Architecture Technologist Series, March 2010.
The Role of Storage Class Memory in Future Hardware Platforms: Challenges and
Opportunities,
HPCA WEST Workshop - Keynote Talk, Bangalore, India, January 2010.
Intra-Disk Parallelism: A Green Storage Solution for Data Centers,
Storage Developer Conference - Academic Innovation Spotlight Talk, Santa Clara, CA,
September 2008.
)
HPCA 2011,
Program Committee Member + Submissions Co-Chair
IEEE Computer Architecture Letters,
Associate Editor.
Associate Editor-in-Chief (January 2010 - March 2011)
Phase Change Memory Tutorial,
Co-Organizer. (Presented HPCA 2010, MICRO 2010, NVMW 2011).
FAST 2010,
Program Committee Member
WISH 2009,
Co-Organizer
IEEE Micro Top Picks 2009,
Program Committee Member
ISCA 2009,
Program Committee Member
ASPLOS 2009,
Web/Publications Chair
SIGMETRICS 2008,
Program Committee Member
ASPLOS 2008,
Program Committee Member
IISWC 2007 Panel - Benchmarking in the Web 2.0 Era,
Organizer and Moderator
Teaching |
Architecture Reading Group |
Potpourri of Links
Page maintained by: Sudhanva Gurumurthi
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