The Tortola Project

Modern computer systems designers must consider many more factors than just raw performance. Thermal output, power consumption, reliability, testing, and security are quickly becoming first-order concerns. Until recently, the vast majority of research efforts in optimizing computer systems have targeted a single logical "layer" in isolation: application code, operating systems, virtual machines, microarchitecture, or circuits. However, we feel that we are reaching the limits of the solutions than we can provide by targeting a single layer in isolation. We also feel that there is an important class of computing challenges that is better suited for more holistic approaches. The Tortola project is exploring of a symbiotic relationship between a virtual machine and the host microarchitecture to solve future challenges in the areas of power, reliability, security, and performance. In general, we attack challenges that would work well using more "reactive" techniques, whereby the hardware can detect a problem, and the virtual machine can use its global knowledge about the program to correct the problem.

A Virtual Interface

The Tortola project introduces a virtual interface between the application software and the underlying machine architecture. The unique aspect of this interface is that it facilitates communication between the microprocessor and the virtual layer, which allow us to investigate combined hardware-software techniques for solving many of the future computing challenges.

Read an extended abstract or see the talk slides from the BARC 2006 Workshop that briefly documents our high-level idea.

Motivating Applications

A Symbiotic Di/dt Solution

We have demonstrated the effectiveness of our approach on the well-known dI/dt problem. The dI/dt problem is a side-effect of modern techniques in low-power processor design. In order to reduce overall power consumption, idle portions of a processor are turned off. If one feature is repeatedly turned on and off, reliability problems can arise. While hardware solutions have been proposed to detect and react to these problematic current variations, they do so at a performance cost to the running application. By simply communicating that information to the virtual machine in real time, we were able to apply standard compiler optimizations (loop unrolling and software pipelining) to remedy future recurrences of the problem using binary code transformations. We were therefore able to provide the safety of the hardware-only technique with the performance improvements possible from a software-only technique.

Read our ISLPED'04 paper: Eliminating Voltage Emergencies via Microarchitectural Voltage Control Feedback and Dynamic Optimization

Our Approach