My advisor is Professor Jack Davidson.

My research work is to retarget VPO to the tms320c54x, a Digital Signal Processor processor from Texas Instruments and to integrate it into the VISTA framework. VISTA gives the application-programmer fine grained control over the code improvement process.

My Master's project is to add support for zero overhead loops in VPO. A zero overhead loop buffer (ZOLB) is an architectural feature that is commonly found in DSP processors. Typically there are instructions that tell the processor the start address and end address of the loop and the number of iterations. The processor loads the whole loop into an internal buffer and executes the loop iterations from there. This saves memory accesses to fetch instructions and also helps avoid the branch that is usually needed at the end of the loop.