Core i7 architecture addresses are 50 bits long
It is common to have 4K pages (12 bits)
→ virtual page numbers are 38 bits long (256G Pages)

Map<VirtualPageNumber,PhysicalPageNumber>
	Hash Table
		const unsigned tableSize;
		VPN table[tableSize];
		unsigned f(VPN) // return value < tableSize
	BST
		// struct node {node* left; node* right; PPN key; VPN val;} 
		// struct{PPN, VPN} heap[];


	PPN table[VPN.MAX_VALUE];
	PPN lookup(VPN v) { return table[v]; }
	
	
	
	
Single-level page table
	PPN table[VPN.MAX_VALUE];

Two-level page table
	PPN table[SIZE1][SIZE2]
	
	PPN lookup(VPN v) {
		// split v into v1 and v2
		int v2 = (v >> 8) & 0xff;
		int v1 = v & 0xff;
		
		int tmp = memory[v2 + ptbr];
		PPN ans = memory[v1 + tmp];
		return ans;
	}



struct PTE {
	bool onDisk;
	bool isAllocated;
	PPN data;
}
PTE * ptbr;

PPN lookup(VPN v) {
	PN1 = getPageNumber1(v); // some bit mask
	PTE pte1 = ptbr[PN1];
	if (!pte1.isAllocated) tell OS to segfault
	if (pte1.onDisk) ask OS to load page and update ptbr[PN1]
	PTE * table2 = pte1.data << 12;
	
	PN2 = getPageNumber2(v); // some bit mask
	PTE pte2 = table2[PN2];
	if (!pte2.isAllocated) tell OS to segfault
	if (pte2.onDisk) ask OS to load page and update table2[PN2]
	PTE * table3 = pte2.data << 12;
	
	...
	
	return pte5.data;
}


Questions:
	What determines the # of PT levels
		The computer engineers at AMD/Intel/ARM/...
	
	What are the benefits of VM
		1. Each process sees all addresses as its own
		2. Processes cannot modify other processes memory
		3. Share some of physical memory
		4. Addresses don't have to change if you change your RAM
	What about 2+ programs running at same time
		1. This is (one of) the point(s) of VM
		2. When your process is swapped in by the OS
			(called a context switch)
			one thing the OS does is reset the PTBR to your page table
	How could we work w/o VM
		1. we ask all processes to be nice to each other
		2. this is hard
		3. and is done in some embedded code
	
	What does OS do to load a page
		it has some DS of pages in RAM and on disk
		eject some RAM page to DISK (and change page table)
		load the requested page from disk to RAM (and update PT)
		update own DS
		return control to your code