This page does not represent the most current semester of this course; it is present merely as an archive.
One more change to make to our pipelined y86 simulator: the rmmovl
and mrmovl
commands will allow us to explore the potential for data hazards.
We'll use fairly aggressive data forwarding in out y86; in particular, the Decode phase will grab to-be-written values from any later stage that has them; a partial diagram of the selector for e_valB
is shown below:
Now, consider what happens if we run the following code:
mrmovl $123, %eax
addl %eax, %eax
When decode it trying to figure out what %eax
is for addl
, mrmovl
is still in the execute phase and none of the forwarding can provide the right answer yet.
To fix this, we'll need to handle a load-use hazard by stalling decode:
instruction | |||||||||
---|---|---|---|---|---|---|---|---|---|
mrmovl |
F | D | E | M | W | ||||
instr2 | F | D | D | E | M | W | |||
instr3 | F | F | D | E | M | W | |||
instr4 | F | D | E | M | W |
Write a file lab7.hcl
that has at least irmovl
, rrmovl
, OPl
, rmmovl
, and mrmovl
working. You may use your lab6 code, or start with our implementation of irmovl
, rrmovl
, and OPl
which we made available as hw6_base.hcl. Don't use your hw6 code if you want to work with any other students in any way; it would not be honorable for them to see your code.
You may work with others. If you do so, include comments in your files stating whom you worked with. This lab will be graded on correctness, not just effort.
DO NOT let others see your hw6 code; if you want to work with others, use our hw6_base.hcl
as a baseline rather than any of your hw6 files.
rmmovl
rA
and rB
and send rvalA
and rvalB
on to executevalC
and valB
to get the address written todwrite
ing with the sum from execute as your addr
and valA
as your written wdval
Writeback changes registers and is not involved in rmmovl
. rmmovl
creates no hazards that aren't already handled by the e_valA
and e_valB
forwarding logic already present in the code.
mrmovl
rB
and send rvalB
on to execute. Also store rA
as a destination; if you use valM
then the existing writeback code does not need to changevalC
and valB
to get the address read fromdread
ing with the sum from execute as your addr
dstM
in decode than the existing logic is sufficient. If you used dstE
instead you'll need to add muxes to either route W_valM
to wvalE
or to set w_valM
based on rvalM
in memory.mrmovl
also creates a load-use hazard, as outlined in the next section.
There is a load-use hazard if we have an mrmovl
in execute whose destination register is the same as one of the sources in decode
(i.e., srcA
or srcB
). All other load-use conditions are handled by the forwarding logic already present in the code. We suggest you add a single-bit wire for detecting this hazard.
Upon detecting a load-use, we need to stall decode. As is usually the case when stalling a stage, we also need to stall other stages before it and bubble the stage immediately after it.
The following code:
irmovl $0x100, %eax
irmovl $0xace, %ecx
rmmovl %ecx, 16(%eax)
should run for 7 cycles and end with memory
| used memory: _0 _1 _2 _3 _4 _5 _6 _7 _8 _9 _a _b _c _d _e _f |
| 0x0000000_: 30 f0 00 01 00 00 30 f1 ce 0a 00 00 40 10 10 00 |
| 0x0000001_: 00 00 |
| 0x0000011_: ce 0a 00 00 |
The following code:
mrmovl $1, %eax # load
addl %eax, %eax # use, so stalled once
mrmovl $2, %ecx # load
addl %ecx, %eax # use, so stalled once
mrmovl $3, %ecx # load
addl %eax, %ecx # use, so stalled once
mrmovl $4, %edx # load
andl %ecx, %eax # unrelated to previous load, so no stall
addl %edx, %edx # use, but 1 cycle separated so no stall
should take 16 cycles to complete and end with register values
| EAX: 21f ECX: 6000021f EDX: c00000 EBX: 0 |
| ESP: 0 EBP: 0 ESI: 0 EDI: 0 |
The file y86/prog5.yo
should run for 11 cycles and end with the following register
| EAX: d ECX: 3 EDX: 80 EBX: a |
| ESP: 0 EBP: 0 ESI: 0 EDI: 0 |
and memory:
| used memory: _0 _1 _2 _3 _4 _5 _6 _7 _8 _9 _a _b _c _d _e _f |
| 0x0000000_: 30 f2 80 00 00 00 30 f1 03 00 00 00 40 12 00 00 |
| 0x0000001_: 00 00 30 f3 0a 00 00 00 50 02 00 00 00 00 60 30 |
| 0x0000002_: 00 |
| 0x0000008_: 03 00 00 00 |
Submit a file named lab7.hcl
on the submission page. Include comments listing anyone you worked with and with what tasks they helped you.
This assignment is both a lab and a homework. Like a lab, you may work with others in creating your solution. Like a homework, it will be graded on correctness, not only effort.