Two groups have participated in the design and testing:
Computer Architecture group led by Dr.Donald M. Chiarulli, and
Optical CAD group led by Dr. Steven P. Levitan.
|
The following chips have been designed, implemented and tested
at the Optics Lab of the Department of Computer Science of the University of Pittsburgh
Two groups have participated in the design and testing:
Computer Architecture group led by Dr.Donald M. Chiarulli, and
Optical CAD group led by Dr. Steven P. Levitan.
|
|
|
Photodetector test chip in SiGe technology. The design consists of three major parts:
Photo-receiver amplifier test circuits (Amit Gupta),
Photo-detectors in SiGe test devices (Leo Selavo), and
Multi-Channel Differential Encoding test circuits (Jason Bakos).
Designed by: Amit Gupta, Leo Selavo, and Jason Bakos
|
|
Optoelectronic switch chip in Silicon on Saphire technology.
Designed by: Jason Bakos and Donald M. Chiarulli
|
|
Sixteen versions of photo-detector and photo-receiver test devices and circuits in Silicon.
Designed by: Jose Martinez, Jeremiah Cessna, and Leo Selavo
|
|
Optically re-configurable Field Programmable Gate Array (OFPGA).
Designed by: Leo Selavo
|
|
SS ALU Chip. CMOS chips flip-chip bonded to GaAs detectors and modulators.
Designed by: Nauromon Wattanapongsakorn, Raju Menon
|
|
Optical 4:1 Mux Chip. It used FET SEED detectors and modulators,
and was done as part of the first ATT/ARPA CO-OP run.
Designed by: Steven P. Levitan
|
All photos by Leo Selavo.