FPGA Benchmark Information

This page contains inputs and routing solutions produced by our IKMB algorithm for 14 circuits frequently used to evaluate routers for symmetrical-array FPGAs (CGE, SEGA, and GBP). Stephen Brown from the University of Toronto has made these benchmark circuits available via anonymous FTP. Each benchmark circuit specifies a fixed logic-block placement as well as the sets of logic-block pins which must be electrically interconnected (i.e., the netlist). This information is conveyed in the form of global routes for the interconnections, which allows the essential information (the placement and netlist) to be readily extracted.

The format used by our router labels FPGA components according to their row and column position on the FPGA. Converting the 14 benchmark circuits to this format results in the ascii-text benchmark-circuit input files. The routing solutions produced by our router are also available, in both ascii-text and graphical-display formats.

The following tables show the maximum channel width required by our router for a complete routing of each circuit, as compared to the CGE, GBP and SEGA routers.

X3000 Results: Complete routing of benchmark circuits on a Xilinx 3000-type part, with switch-block flexibility of 6 and 60% connectivity on the channel edges.


Xilinx 3000-Series Maximum required channel width Circuits for a complete routing
Input FPGA size #nets CGE Ours (View Solution)
busc 12 by 13 151 10 7 (graphical,text) dma 16 by 18 213 10 9 (graphical,text) bnre 21 by 22 352 12 9 (graphical,text) dfsm 22 by 23 420 10 9 (graphical,text) z03 26 by 27 608 13 11 (graphical,text)
Totals: 1744 55 45 Ratios: 1.22 1.00

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X4000 Results: Complete routing of benchmark circuits on a Xilinx 4000-type part, with switch-block flexibility of 3 and 100% connectivity on the channel edges.


Xilinx 4000-Series Maximum required channel width Circuits for a complete routing
Input FPGA size #nets SEGA GBP Ours (View Solution)
alu4 19 by 17 255 15 14 11 (graphical,text) apex7 12 by 10 115 13 11 10 (graphical,text) term1 10 by 9 88 10 10 8 (graphical,text) example2 14 by 12 205 17 13 11 (graphical,text) too_large 14 by 14 186 12 12 10 (graphical,text) k2 22 by 20 404 17 17 15 (graphical,text) vda 17 by 16 225 13 13 12 (graphical,text) 9symml 11 by 10 79 10 9 8 (graphical,text) alu2 15 by 13 153 11 11 9 (graphical,text)
Totals: 1710 118 110 94 Ratios: 1.26 1.17 1.00