Computer Science 551/851
Advanced Topics in Computer Architecture:
A Microprocessor Survey
Beginning-of-Course Memo--Fall 1999
The Fall 1999 course on Advanced Topics in Computer Architecture will survey
the architecture and organization of some current high-performance microprocessors.
We will spend the first two weeks examining some background material from
the 2nd edition of the more advanced Hennessy and Patterson book (Computer
Architecture: A Quantitative Approach), using the MIPS R12000 as a
concrete basis for discussion. The remainder of the course will be structured
around presentations by teams of students. First, we will examine four
or five other current processors: the Intel Pentium III, the AMD K7 Athlon,
the Alpha 21264, the UltraSPARC III, and possibly the HP PA-8500. Then
in the last half of the course, we will explore cross-cutting issues
like issue topology, memory hierarchy, and instruction set, comparing and
contrasting the different solutions exhibited by our chosen processors.
For their presentations, students will be expected to gather relevant
source material from the published literature, the Web, or inquiries made
to the manufacturers. Our goal will be to avoid gee-whiz computer "pop"
to the extent possible, and instead focus on the fundamental structural
and architectural ideas underlying these processors' design choices. Hopefully
in the process, we will expose some of the subtle tradeoffs that make architecture
such a challenging area.
CS 551 and CS 851 will differ only in the final project required.
Who should take this course
This seminar is open to any graduate student who has completed a computer
architecture course, or with the instructors permission, any undergraduate
student who has completed CS 308, EE 435, or CS 654. The major goals of
this course are:
-
To provide participants with a detailed knowledge of the architecture Band
organization of today's major high-performance processors
-
To explore the wide range of architectural solutions available and in use
for attacking various performance problems, and to examine their merits
-
To gain an understanding of the performance and complexity tradeoffs that
drive processor design
-
To foster research in architecture-related areas
This course may therefore be of interest even to senior graduate students
who have completed their course requirements, and may help undergraduates
as they prepare grad-school applications.
Administrative matters
Instructor
Kevin Skadron <skadron@cs.virginia.edu>
Olsson 215, 2-2042
Office hours: in general, Mon. & Fri., 3:30-4:30; also after class
or by appt.
(This will vary over the semester due to my travel schedule; I will
keep you posted.)
When and where
Tuesdays and Thursdays, time 3:30--4:45 pm
Olsson 009, except Thursday, 9/9 when we meet in D-115
Requirements
Team presentations
Each student---regardless of whether you are sitting in or taking
this class for credit---will be a member of two "teams," one responsible
for a particular microprocessor and the other responsible for one cross-processor
theme.
Each team will make in-class presentations of its results, and be responsible
for the distribution of a package of written materials beforehand.
Class participation
Team presentations will include a large discussion component, to which
all students are expected to contribute.
Term paper
A substantial paper on a course-related topic of a student's choice
is due at the end of the term. Jointly-authored papers are allowed, with
the instructors' permission. The paper's scope will be dependent on whether
the class is being taken as CS 551 or CS 851 and on the number of joint
authors. Depending on a student's goals, the paper may be a broad survey
of some topic, a detailed study of some processor or some component of
a processor, or a research paper. The instructor will be happy to provide
assistance in preparing papers for publication; more aggressive research
may be eligible for a major conference or journal, and less aggressive
research or more survey-oriented papers may be suitable for publication
in Computer Architecture News, IEEE Potentials, or ACM Crossroads.
Reading
Textbook
John Hennessy and David Patterson,
Computer Architecture: A Quantitative
Approach, 2nd ed., Morgan Kaufmann Publishers, San Mateo, CA, 1996.
This text is recommended, not required. We will not cover the whole
thing! But students with an interest in this subject may wish to buy the
book anyway.
Other readings
Copies of any supplemental readings will be handed out in class. In
addition, student teams will distribute hardcopy results of their researches.
Schedule
All of the below subject to change!
Weeks 1 through 3: background lectures based mostly on chapters 4 and
5 of the text, using the MIPS R12000 as a basis for discussion.
Weeks 4 through 8: CPU team presentations. Each microprocessor gets
2 classes. We will begin with the Digital Alpha 21264.
Weeks 9 and onward: Cross-cutting-theme team presentations. Each theme
gets 2 classes. We will begin with instruction-set architecture.
We may need to reschedule several classes in early November; stay tuned.