Computer Science 854/551

Advanced Computer Architecture: 
A Microprocessor Survey

Beginning-of-Course Memo--Spring 2001

(Who should take this course | Administrative)

The Spring 2001 course on Advanced Computer Architecture will survey the architecture and organization of some current high-performance microprocessors and explore new, aggressive architectures being proposed in the research literature. We will spend the first few weeks examining some background material from the 2nd edition of the more advanced Hennessy and Patterson book (Computer Architecture: A Quantitative Approach) and some subsequently published but vital material from the research literature.  Then we will compare and contrast four or five current processors: the Intel Pentium III/AMD K7 Athlon, the Intel Pentium 4, the Alpha 21264, the UltraSPARC III, and the Intel iTanium (formerly known as Merced).  As part of this, we will explore the different designers' choices in cross-cutting issues like issue topology, memory hierarchy, and instruction set.  In the final phase of the course, we will read papers from the research literature discussing novel computer organizations like trace processors and superspeculative processors.

Much of the course will be structured around presentations by teams of students.  For their presentations, students will be expected to gather relevant source material from the published literature, the Web, or inquiries made to the manufacturers. Our goal will be to avoid gee-whiz computer "pop" to the extent possible, and instead focus on the fundamental structural and architectural ideas underlying these processors' design choices. Hopefully in the process, we will expose some of the subtle tradeoffs that make architecture such a challenging area.

The course grade will be based on four main components:

The final research project is expected to be a semester-long project with a quality technical write-up at the end.  It is hoped that these projects will serve as the basis for larger research projects and that many will lead to publications.  Last year's course produced one conference publication, two workshop publications, and one technical report.

This course can accommodate a small number of undergraduates, registering under 551.  The 551 version will differ only in the scope of the assignments.

Who should take this course

This seminar is open to any graduate student who has completed CS 654 or an ECE counterpart.  A small number of undergraduate students who have completed ECE 435 will also be admitted with the instructor's permission. The major goals of this course are: This course may therefore be of interest even to senior CS and ECE graduate students who have completed their course requirements, and may help undergraduates as they prepare grad-school applications.

Administrative matters

Kevin Skadron <>
Olsson 215, 2-2042
Office hours: TBD or by appt.

When and where
Tuesdays and Thursdays, time 3:30--4:45 pm, Olsson 011

Office hours
By appointment


Team presentations
Each student---regardless of whether you are sitting in or taking this class for credit---will be a member of two "teams," one responsible for a particular microprocessor and the other responsible for one cross-processor theme. Each team will make in-class presentations of its results, and be responsible for the distribution of a package of written materials beforehand.

Web site
We will put together a web site presenting our findings.  Each team will be responsible for adding its portion of the website.

Class participation
Team presentations will include a large discussion component, to which all students are expected to contribute.

Term paper
A substantial research paper is due at the end of the term. Jointly-authored papers are allowed, with the instructors' permission. The paper's scope will be dependent on whether the class is being taken as CS 551 or CS 851 and on the number of joint authors.  A number of possible topics will be provided near the beginning of the semester. The instructor will be happy to provide assistance in preparing papers for publication; more aggressive research may be eligible for a major conference or journal, and less aggressive research may be suitable for publication in a workshop or in ACM SIGARCH's Computer Architecture News.

Project proposal: 5%
Project progress report: 10%
Project final paper: 35%
Presentations: 25%
Quantitative exercise: 5% (team)
Website: 5% (team)
Participation: 15%

For the presentations, we will employ peer grading.  Also, undergraduates taking the 551 version of the course will take a test after the foundation material has been presented.  This will constitute 10% of the grade, and the above grading scale will be adjusted accordingly.

Important: to get a passing grade in this course, every component must be completed to a satisfactory degree.

All work will be implicitly pledged.  Discussion and collaboration is encouraged on all parts of the course.  But naturally, all work must be originial with appropriate citations.


Lectures will not directly follow a textbook.  But we will use:
John Paul Shen and Mikko Lipasti, Fundamentals of Superscalar Processor Design, draft edition.
extensively as a reference.  It is required and is available as a packet from the bookstore.  Further chapters are forthcoming.

The following book may also be useful:

John Hennessy and David Patterson, Computer Architecture: A Quantitative Approach, 2nd ed., Morgan Kaufmann Publishers, San Mateo, CA, 1996.
It is available from the library, and enough members of the class have a copy that there is no need to buy your own copy.

Other readings
Copies of any supplemental readings will be handed out in class. In addition, student teams will distribute hardcopy results of their researches.

Last updated Jan. 18, 2001
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