List of Reference Papers
Computer Microarchitecture
Kevin Skadron
Background
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K. Diefendorff. "PC
Processor Microarchitecture: A Concise Review of the Techniques Used in
Modern PC Processors." Microprocessor Report, 13(9), July
12, 1999. (Also available in pdf)
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A. K. Uht, V. Sindagi, and S. Samanathan, "Branch
Effect Reduction Techniques." IEEE Computer, May 1997,
pp. 71-81. (Abstract)
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K. Skadron, P.S. Ahuja, M. Martonosi, and D.W. Clark. "Branch
Prediction, Instruction-Window Size, and Cache Size: Performance Tradeoffs
and Simulation Techniques." IEEE Transactions on Computers,
to appear. (Abstract;
paper also available in pdf)
Branch Prediction
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P.-Y. Chang, E. Hao, T.-Y. Yeh, and Y. Patt, "Branch
Classification: A New Mechanism for Improving Branch Predictor Performance."
Proceedings
of the 27th International Symposium on Microarchitecture, California,
November, 1994.
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S. Kim and G. Tyson. "Analyzing
the Working Set Characteristics of Branch Execution." Proceedings
of the 31st International Symposium on Microarchitecture, December,
1998.
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M. Evers, S. J. Patel, R. S. Chappell, and Y. N. Patt, "Analysis
of Correlation and Predictability: What Makes Two-Level Branch Predictors
Work." Proceedings of the 25th International Symposium on
Computer Architecture, June 1998.
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K. Skadron, M. Martonosi, and D. W. Clark. "Alloying
Global and Local Branch History: A Robust Solution to Wrong-History Mispredictions."
Tech Report TR-606-99, Princeton Dept. of Computer Science, Oct. 1999.
Submitted for publication. (Abstract;
paper also available in pdf)
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R. Nair, "Dynamic
Path-Based Branch Correlation." Proceedings of the 28th International
Symposium on Microarchitecture, December 1995.
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D. I. August, W. W. Hwu, and S. A. Mahlke, "A
Framework for Balancing Control Flow and Predication." Proceedings
of the 30th International Symposium on Microarchitecture, December
1997.
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J. Emer and N. Gloy. "A
Language for Describing Predictors and its Application to Automatic Synthesis."
Proceedings of the 24th International Symposium on Computer Architecture,
June 1997.
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I. K. Chen, J. T. Coffey, and T. N. Mudge. "Analysis
of Branch Prediction via Data Compression." Proceedings of
the Seventh International Conference on Architectural Support for Programming
Languages and Operating Systems, Oct. 1996.
Simulation
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D. Burger and T. Austin, "The
SimpleScalar Toolset, Version 2.0." Tech. Report TR-1342, Univ.
of Wisconsin-Madison Computer Sciences Dept., June 1997.
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K. Skadron, P.S. Ahuja, M. Martonosi, and D.W. Clark. "Branch
Prediction, Instruction-Window Size, and Cache Size: Performance Tradeoffs
and Simulation Techniques." IEEE Transactions on Computers, to appear.
(Abstract;
paper also available in pdf)
Misc. Papers
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M. M. Martin, A. Roth, C. N. Fischer, "Exploting
Dead Value Information." Proceedings of the 30th International
Symposium on Microarchitecture, December 1997. (Abstract)
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E. Rotenberg, Q. Jacobson, Y. Sazeides, J. Smith, "Trace
Processors." Proceedings of the 30th International Symposium
on Microarchitecture, December 1997.
