2024
CC-NIC: A Cache-Coherent Interface to the NIC
Henry Schuh, Arvind Krishnamurthy, David Culler, Henry M Levy, Luigi Rizzo, Samira Khan, and Brent E. StephensInternational Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS)
San Diego, April 2024
2023
A Cloud-Scale Characterization of Remote Procedure Calls
Korakit Seemakhupt, Brent E. Stephens, Samira Khan, Sihang Liu, Hassan Wassel, Soheil Hassas Yeganeh, Alex C. Snoeren, Arvind Krishnamurthy, David E. Culler, and Henry M. LevyThe ACM Symposium on Operating Systems Principles (SOSP)
Koblenz, October 2023.
Profiling Hyperscale Big Data Processing
Abraham Gonzalez, Aasheesh Kolli, Samira Khan, Sihang Liu, Vidushi Dadu, Sagar Karandikar, Jichuan Chang, Krste Asanovic, and Parthasarathy RanganathanThe International Symposium on Computer Architecture (ISCA)
Orlando, June 2023. [source code]
Artifact Available, Functional, and Reproduced
NearPM: A Near-Data Processing System for Storage-Class Applications
Yasas Senevirathne, Korakit Seemakhupt, Sihang Liu, and Samira KhanThe European Conference on Computer Systems (EuroSys)
Rome, May 2023. [source code HW] [source code SW]
Artifact Available and Functional
Side-Channel Attacks on Optane Persistent Memory
Sihang Liu, Suraaj Kanniwadi, Martin Schwarzl, Andreas Kogler, Daniel Gruss, and Samira KhanThe 32nd USENIX Security Symposium (USENIX Security)
California, August 2023. [source code]
Artifact Available, Functional, and Reproduced
2022
Pavise: Integrating Fault Tolerance Support for Persistent Memory Applications
Han Jie Qiu, Sihang Liu, Xinyang Song, Samira Khan, and Gennady PekhimenkoInternational Conference on Parallel Architectures and Compilation Techniques (PACT)
Chicago, October 2022. [source code]
Artifact Available at GitHub
Efficient 2D Graph SLAM for Sparse Sensing
Hanzhi Zhou, Zichao Hu, Sihang Liu, and Samira KhanInternational Conference on Intelligent Robots and Systems (IROS)
Kyoto, October 2022. [video] [demo] [source code]
Artifact Available at GitHub
PIMProf: An Automated Program Profiler for Processing-in-Memory Offloading Decisions
Yizhou Wei, Minxuan Zhou, Sihang Liu, Korakit Seemakhupt, Tajana Rosing, and Samira KhanDesign, Automation, and Test in Europe Conference (DATE)
Virtual, March 2022. [source code]
Artifact Available at GitHub
PiMulator: A Fast and Flexible Processing-in-Memory Emulation Platform
Sergiu Mosanu, Mohammad Nazmus Sakib, Tommy Tracy II, Ersin Cukurtas, Alif Ahmed, Preslav Ivanov, Samira Khan, Kevin Skadron, and Mircea StanDesign, Automation, and Test in Europe Conference (DATE)
Virtual, March 2022.
2021
Write Prediction for Persistent Memory Systems
Suyash Mahar, Sihang Liu, Korakit Seemakhupt, Vinson Young, and Samira KhanInternational Symposium on Parallel Architectures and Compilation Techniques (PACT)
Virtual, Sep 2021. [pdf] [slides] [video] [source code]
Artifact Available at GitHub
PMNet: In-Network Data Persistence
Korakit Seemakhupt, Sihang Liu, Yasas Senevirathne, Muhammad Shahbaz, and Samira KhanInternational Symposium on Computer Architecture (ISCA)
Virtual, June 2021. [pdf] [slides] [video] [source code]
Artifact Available at GitHub
MultiPIM: A Detailed and Configurable Multi-Stack Processing-In-Memory Simulator
Chao Yu, Sihang Liu, and Samira KhanComputer Architecture Letters (CAL) 2021. [pdf] [source code]
Artifact Available at GitHub
PMFuzz: Test Case Generation for Persistent Memory Programs
Sihang Liu, Suyash Maher, Baishakhi Ray, and Samira KhanInternational Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS)
Virtual, April 2021. [summary] [pdf] [source code]
Artifact Available and Artifact Evaluated, Functional, Reproduced
2020
Cross-Failure Bug Detection in Persistent Memory Programs
Sihang Liu, Korakit Seemakhupt, Yizhou Wei,Thomas Wenisch, Aasheesh Kolli, and Samira KhanInternational Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS)
Lausanne, Switzerland, March 2020. [pdf] [slides] [summary] [video][PIRL video] [source code]
Artifact Available and Artifact Evaluated, Functional, Featured at PIRL 2020 and NVMW 2021
2019
Janus: Optimizing Memory and Storage Support for Non-Volatile Memory Systems
Sihang Liu, Korakit Seemakhupt, Gennady Pekhimenko, Aasheesh Kolli, and Samira KhanInternational Symposium on Computer Architecture (ISCA)
Phoenix, USA, June 2019. [pdf] [slides] [lightning slides] [video]
MICRO TOP PICKS 2020 Honorable Mention
PIMProf: A Fast Performance Profiler for Processing-in-Memory Systems
Yizhou Wei, Sihang Liu, and Samira KhanShort Student Research Competition Paper at International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS) Student Research Competition
Providence, RI, April 2019.
PMTest: A Fast and Flexible Testing Framework for Persistent Memory Programs
Sihang Liu, Yizhou Wei, Jishen Zhao, Aasheesh Kolli, and Samira KhanInternational Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS)
Providence, RI, April 2019. [pdf] [slides] [video][source code] [PIRL blog]
Featured at PIRL 2019 Blog, NVMW Memorable Paper Award Finalist
2018
ARMOR: Towards Restricted Approximation with A Worst-Case Guarantee
Sihang Liu, Kevin Angstadt, Mike Ferdman, and Samira Khan,Workshop on Approximate Computing Across the Stack (WAX), held in association with the International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS)
Williamsburg, VA, March 2018. [pdf] [slides]
Crash Consistency in Encrypted Non-Volatile Main Memory Systems
Sihang Liu, Aasheesh Kolli, Jinglei Ren, and Samira Khan,International Symposium on High-Performance Computer Architecture (HPCA)
Vienna, Austria, February 2018. [pdf] [slides] [video]
2017
Detecting and Mitigating Data-Dependent DRAM Failures by Exploiting Current Memory Content
Samira Khan, Chris Wilkerson, Zhe Wang, Alaa Alameldeen, Donghyuk Lee, and Onur MutluInternational Symposium on Microarchitecture (MICRO)
Boston, USA, October 2017. [pdf] [slides]
Design-Induced Latency Variation in Modern DRAM Chips: Characterization, Analysis, and Latency Reduction Mechanisms
Donghyuk Lee, Samira Khan, Lavanya Subramanian, Saugata Ghose, Rachata Ausavarungnirun, Gennady Pekhimenko, Vivek Seshadri, and Onur MutluInternational Conference on Measurement and Modeling of Computer Systems (SIGMETRICS)
Champaign-Urbana, Illinois, USA, June 2017. [pdf] [slides]
Automata-to-Routing: An Open-Source Toolchain for Design-Space Exploration of Spatial Automata Processing Architectures
Jack Wadden, Samira Khan, Kevin Skadron25th IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM)
Napa, CA, USA, April. 2017 [pdf] [source code]
SoftMC: A Flexible and Practical Open-Source Infrastructure for Enabling Experimental DRAM Studies
Hasan Hassan, Nandita Vijaykumar, Samira Khan, , Saugata Ghose, Kevin Chang, Gennady Pekhimenko, Donghyuk Lee, Oguz Ergin, and Onur Mutlu23rd International Symposium on High-Performance Computer Architecture (HPCA)
Austin, TX, USA, February 2017. [pdf] [slides] [source code]
2016
A Case for Memory Content-Based Detection and Mitigation of Data-Dependent Failures in DRAM
Samira Khan, Chris Wilkerson, Donghyuk Lee, Alaa R. Alameldeen, and Onur MutluIEEE Computer Architecture Letters (CAL)
November 2016. [pdf]
Zorua: A Holistic Approach to Resource Virtualization in GPUs
Nandita Vijaykumar, Kevin Hsieh, Gennady Pekhimenko, Samira Khan, Ashish Shrestha, Saugata Ghose, Adwait Jog, Phillip B. Gibbons, andOnur Mutlu
49th International Symposium on Microarchitecture (MICRO)
Taipei, Taiwan, October 2016. [pdf] [slides]
Accelerating Pointer Chasing in 3D-Stacked Memory: Challenges, Mechanisms, Evaluation
Kevin Hsieh, Samira Khan, Nandita Vijaykumar, Kevin K. Chang, Amirali Boroumand, Saugata Ghose, and Onur Mutlu34th IEEE International Conference on Computer Design (ICCD)
Phoenix, AZ, USA, October 2016. [pdf] [slides] [source code]
PARBOR: An Efficient System-Level Technique to Detect Data Dependent Failures in DRAM
Samira Khan,  Donghyuk Lee, and Onur MutluInternational Conference on Dependable Systems and Networks (DSN)
France, June 2016. [pdf] [slides]
Understanding Latency Variation in Modern DRAM Chips: Experimental Characterization, Analysis, and Optimization
Kevin K. Chang, Abhijith Kashyap, Hasan Hassan, Kevin Hsieh, Donghyuk Lee, Saugata Ghose, Gennady Pekhimenko, Tianshi Li,   Samira Khan,  and Onur MutluInternational Conference on Measurement and Modeling of Computer Systems (SIGMETRICS)
France, June 2016. [pdf] [slides] [data set]
Simultaneous Multi-Layer Access: Improving 3D-Stacked Memory Bandwidth at Low Cost
Donghyuk Lee, Saugata Ghose, Gennady Pekhimenko,  Samira Khan,  and Onur MutluACM Transactions on Architecture and Code Optimization (TACO), Vol. 12, January 2016
Presented at the 11th HiPEAC Conference, Prague, Czech Republic, January 2016. [pdf] [slides] [source code]
2015
ThyNVM: Enabling Software-Transparent Crash Consistency in Persistent Memory Systems
Jinglei Ren, Jishen Zhao,  Samira Khan,  Jongmoo Choi, Yongwei Wu, and Onur Mutlu48th International Symposium on Microarchitecture (MICRO)
Waikiki, Hawaii, USA, December 2015. [pdf] [slides] [source code]
The Application Slowdown Model: Quantifying and Controlling the Impact of Inter-Application Interference at Shared Caches and Main Memory
Lavanya Subramanian, Vivek Seshadri, Arnab Ghosh,  Samira Khan,  and Onur Mutlu48th International Symposium on Microarchitecture (MICRO)
Waikiki, Hawaii, USA, December 2015. [pdf] [slides]
AVATAR: A Variable-Retention-Time (VRT) Aware Refresh for DRAM Systems
Moinuddin Qureshi, Dae Hyun Kim,  Samira Khan,  Prashant Nair, and Onur Mutlu45th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN)
Rio de Janeiro, Brazil, June 2015.   [pdf]
Solving the DRAM Scaling Challenge: Rethinking the Interface between Circuits, Architecture, and Systems
Samira KhanJob Talk, March-May 2015.   [slides]
Adaptive-Latency DRAM: Optimizing DRAM Timing for the Common-Case
Donghyuk Lee, Yoongu Kim, Gennady Pekhimenko,  Samira Khan,  Vivek Seshadri, Kevin Chang, and Onur Mutlu21st International Symposium on High Performance Computer Architecture (HPCA)
San Francisco, CA, February 2015.   [pdf] [slides] [data set]
2014
The Efficacy of Error Mitigation Techniques for DRAM Retention Failures: A Comparative Experimental Study
Samira Khan, Donghyuk Lee, Yoongu Kim, Alaa Alameldeen, Chris Wilkerson, and Onur MutluACM International Conference on Measurement and Modeling of Computer Systems (SIGMETRICS)
Austin, Texas, June 2014.   [pdf] [slides] [data set]
Last-level Cache Deduplication
Yingying Tian, Samira Khan, Daniel Jimenez, and Gabriel Loh:International Conference on Supercomputing, (ICS)
Muenchen, Germany, June 2014.  [pdf]
Improving Cache Performance by Exploiting Read-Write Disparity
Samira Khan,  Alaa Alameldeen, Chris Wilkerson, Onur Mutlu, and Daniel Jimenez20th International Symposium on High Performance Computer Architecture (HPCA)
Orlando, Florida, February 2014.  [pdf] [slides]
Best Paper Session
2013
Temporal-based Multilevel Correlating Inclusive Cache Replacement
Yingying Tian, Samira Khan, and Daniel JimenezACM Transactions on Architecture and Code Optimization (TACO)
December 2013.   [pdf]
A Case for Efficient Hardware-Software Cooperative Management of Storage and Memory
Justin Meza, Yixin Luo,   Samira Khan,   Jishen Zhao, Yuan Xie, and Onur Mutlu5th Workshop on Energy-Efficient Design (WEED)
Tel-Aviv, Israel, June 2013.  [pdf] [slides]
Improving Memory Reliability, Power and Performance Using Mixed-Cell Designs
Alaa Alameldeen, Nam Sung Kim,   Samira Khan,   Hamid Reza Ghasemi, Chris Wilkerson, Jaydeep Kulkarni, and Daniel A. JimenezIntel Technology Journal (ITJ) Special Issue on Memory Resiliency, Vol. 17, No. 1, May 2013.    [pdf]
Improving Multi-Core Performance Using Mixed-Cell Cache Architecture
Samira Khan, Alaa Alameldeen, Chris Wilkerson, Jaydeep Kulkarni, and Daniel A. Jimenez19th International Symposium on High Performance Computer Architecture (HPCA)
Shenzhen, China, February 2013.   [pdf] [slides]
2012
Improving Writeback Efficiency with Decoupled Last Write Prediction
Zhe Wang,   Samira Khan,  and Daniel A. Jimenez19th International Symposium on Computer Architecture (ISCA)
Portland, Oregon, June 2012.  [pdf]
Rank Idle Time Prediction Driven Last-Level Cache Writeback
Zhe Wang,  Samira Khan,   and Daniel A. JimenezACM SIGPLAN Workshop on Memory Systems Performance and Correctness (MSPC)
Beijing, China, June 2012.   [pdf]
Decoupled Dynamic Cache Segmentation
Samira Khan, Zhe Wang, and Daniel A. Jimenez18th International Symposium on High Performance Computer Architecture (HPCA)
New Orleans, Louisiana, February 2012.   [pdf] [slides]
2010
Sampling Dead Block Prediction Last-Level Caches
Samira Khan, Yingying Tian, and Daniel A. Jimenez43rd International Symposium on Microarchitecture (MICRO)
Atlanta, Georgia, December 2010.   [pdf] [slides]
Insertion Policy Selection Using Decision Tree Analysis
Samira Khan, and Daniel A. Jimenez28th International Conference of Computer Design (ICCD)
Amsterdam, Netherlands, October 2010.   [pdf]
Using Dead Blocks as a Virtual Victim Cache
Samira Khan, Daniel A. Jimenez, Doug Burger, and Babak Falsafi19th International Conference on Parallel Architectures and Compilation Techniques (PACT)
Vienna, Austria, September 2010.   [pdf]