TANIYA SIDDIQUA

295 WAHOO WAY, APT#1233, COLLEGE PARK – UNIVERSITY PLACE, CHARLOTTESVILLE, VA – 22903
PHONE 434-284-1516  
E-MAIL taniya@cs.virginia.edu, tsiddiqua@yahoo.com 
WEB www.cs.virginia.edu/~ts7au 



AREA OF INTEREST
	*	Computer Architecture, Embedded Systems, VLSI Circuit Design 

EDUCATION
	*	PhD Student, (2007-till date) Department of Computer Science, University of Virginia
	*	Master of Science in Computer Science, (2007-2009) from Department of Computer Science, University of Virginia
	*	Bachelor of Science in Computer Science and Engineering,(2000-2005) from Department of Computer Science and Engineering(CSE), Bangladesh University of Engineering and Technology(BUET) 
           
GRADUATE COURSES
	*	Computer Architecture, Theory of Computation, Cyber-Physical Systems, Algorithms, Statistics for Engineers and Scientists, VLSI design, Operating Systems, Advanced VLSI Systems Design, Non-Volatile Memory Systems, Dependable Computing Systems

RESEARCH
	*	Research Assistant(2008-till date):
		Processor Reliability, Advisor: Dr. Sudhanva Gurumurthi

	*	Journals/Publications/Posters:
		1. T. Siddiqua, S. Gurumurthi, “Enhancing Recovery in SRAM Arrays Through Recovery Boosting”, IEEE Transactions on Very Large Scale Integration Systems, 2011.
		2. T. Siddiqua, S. Gurumurthi and M. R. Stan, “Modeling and Analyzing NBTI in the Presence of Process Variation", ISQED, March 2011. 
		3. V. Mohan, T. Siddiqua, S. Gurumurthi and M. R. Stan, "How I Learned to Stop Worrying and Love Flash Endurance", 2nd Workshop on Hot Topics in Storage and File Systems (HotStorage), Co-located with USENIX Annual Technical Conference, June 2010.
		4. T. Siddiqua, S. Gurumurthi, “Recovery Boosting: A Technique to Enhance NBTI Recovery in SRAM Arrays”, ISVLSI, July 2010. (Acceptance Rate=33%)
		5. T. Siddiqua, S. Gurumurthi, “A Multi-Level Approach to Reduce the Impact of NBTI on Processor Functional Units", GLSVLSI, May 2010. (Acceptance Rate=18%)
		6. T. Siddiqua, S. Gurumurthi, “Dynamic NBTI Management in Multicore Processor”, ACM Student Research Competition, Grace Hopper Celebration, September 2009.
        	7. T. Siddiqua, S. Gurumurthi, “Balancing Soft Error Coverage with Lifetime Reliability in Redundantly Multithreaded Processors”, International Symposium on MASCOTS, September 2009. (Acceptance Rate=20%)
        	8. T. Siddiqua, S. Gurumurthi, "NBTI-Aware Dynamic Instruction Scheduling", IEEE Workshop on Silicon Errors in Logic - System Effects, March 2009.
        	9. T. Siddiqua, "Reliability Adaptive Computer Architecture", CRA-W/CDC PLOSA Workshop, March 2009.

	*	Past Research:
		1. X-member of Center for Research on Bangla Language Processing, headed by Dr. Mumit Khan (  August, 2006 – July,2007)
		
	*	MS Thesis:
		Balancing Soft Error Coverage with Lifetime Reliability in Redundantly Multithreaded Processors under supervision of Dr. Sudhanva Gurumurthi

	*	Undergraduate Thesis:
		XML Compression Using Arithmetic Coding under supervision of Dr. Kaykobad

AWARDS RECEIVED
	*	Cyber Physical Systems Summer School Scholarship, Georgia Institute of Tech, 2010
	*	GLSVLSI Travel Grant Award, 2010
	*	SRC 1st Place Winner, Grace Hopper Conference, 2009
	*	Grace Hopper Scholarship (from Sun Microsystem for Hardware Research), 2009
	*	ISCA Travel Grant Award, 2009
	*	Cash Award, Travel Grant, ACM Student Research Competition, 2009
	*	Grad Cohort Travel Grant, 2009
	*	CRA-W PLOSA Travel Grant, 2009
	*	Golden Key Intrl. Honor Society’s Top 15% Graduate Std Award, 2008 
	*	Graduate Teaching Fellowship, University of Virginia
	*	Dean’s Merit List Award, BUET
	*	University Merit Scholarship, awarded to top 10% in a semester, BUET
	*	3rd Place and Best Female Team,  The 26th ACM International Collegiate Programming Contest, Asia Regional 2001
	*	Best Student Award, 1997 - S.K.B.Z. Bangladesh Islamia School for showing excellent and best performance all through high school 

PROJECTS
	*   	Analyzing Flash Reliability
	*	NBTI-Aware SRAM Structure Design
	*	Mutation Resistant Runtime Code using Kernel Attestation
	*	Analyzing Circuit-aware Microarchitectural Reliability
	*	Tiling Puzzle Solver
	*	Remote Configuration, Management and Usage of Sensor Network using GSM-enabled Devices
	*	SimHAT: Simulated Hardware-based Attestation evaluation Tool
	*	Turing Machine Simulator
	*	Intelligent Examination System
	*	Blood Bank Management system 
	*	Online Class-Test and Assignment Marking 
	*	System analysis and design of Anudip Taxicab Limited 
	*	Implementation of different layers of OSI model using serial port
	*	Voice recognition software
	*	Mail Server (SMTP&POP) and Proxy Server
	*	Compiler Development
	*	Design and implementation of a 8-bit microprocessor 
	*	Design and implementation of an NIC (network interface card )
	*	Design & Implementation of an 8 bit Arithmetic Logic Unit &Multiplier

COMPUTER SKILLS
	*	Languages: C, C++, Java, Prolog, 80x86 Assembly language      
	*	Database:   MySQL, MS-SQL Server, MS Access, Oracle
	*	Operating Systems: Windows, LINUX, DOS
	*	Graphics Library: OpenGL
	*	Web Development Language: HTML, ASP, XML, PHP
	*	Programming Environments: MS Visual Studio.NET, Turbo C++, Kawa, Turbo Prolog, Developer 2000, Eclipse Platform, Struts
	*	Design and Modeling: OMT, UML
	*	Simulators: M5, SimpleScalar, Wattch, HotSpot, Cadence

TEACHING EXPERIENCE
	*	Teaching Assistant: University of Virginia (Fall-2007, Spring-2008)
		Courses Taken: E-Commerce Technologies, Advanced Computer Architecture, Introduction to Programming
	*	Lecturer, Department of CSE, BRAC University(January, 2006- August,2007)
		Courses Taken: Computer Architecture, Digital System Design, Microprocessors, Digital Logic Design, Artificial Intelligence, Computer Networks, Algorithms, Programming Language-C

ACADEMIC/PROFESSIONAL TRAINING
	*	Two days workshop in CRA-W Grad Cohort, March 2009.
	*	Two days workshop in CRA-W/CDC PLOSA, March 2009.
	*	Two days workshop on ‘Educate the Educator Program’ in TARC (Training and Resource Center), Savar, Dhaka

MEMBERSHIPS
	*	Student member, ACM (Association for Computing Machinery), SIGARCH
	*	Student member, IEEE (International Organization of Electronics and Electrical Engineers), IEEE Women in Engineering
	*	Associate Member, Bangladesh Computer Society
	*	Associate Member, The Institution of Engineers, Bangladesh 

REVIEW
	* 	IEEE Transactions on Computers (TC), 2011
        * 	IEEE Transactions on Very Large Scale Integration Systems (TVLSI), 2011
        * 	IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2011
	*	International Conference of Computer Aided Design (ICCAD), 2009
	*	Computer Architecture Letters (CAL), 2010.

REFERENCES
	* 	Available upon reques