Download Resume

PDF | TXT

Area of Interest

Computer Architecture, Embedded Systems, VLSI Circuit Design

Education

* PhD Candidate, Department of Computer Science, University of Virginia(2007-till date)
Dissertation Topic:
A Multi-level Approach to Processor and Memory Reliability
* Master of Science in Computer Science, (2007-2009) from Department of Computer Science, University of Virginia
MS Thesis:
Balancing Soft Error Coverage with Lifetime Reliability in Redundantly Multithreaded Processors under supervision of Dr. Sudhanva Gurumurthi
* Bachelor of Science in Computer Science and Engineering,(2000-2005) from Department of Computer Science and Engineering(CSE), Bangladesh University of Engineering and Technology(BUET)
Undergraduate Thesis:
XML Compression Using Arithmetic Coding under supervision of Dr. Kaykobad

Work Experience

* Graduate Technical Intern at Intel Corp. (Summer,2011-Fall,2011):
Technology for Reliable Usage Group
Manager: Arijit Biswas, Mentor: Athanasios E. Papathanasiou
Job Description: Development of a set of error analysis tools, analysis of the processor and DRAM error data to estimate hard and soft error rates and development of a memory error prediction model.

* Research Assistant at University of Virginia (Spring,2008-2011, Spring,2012):
Advisor: Dr. Sudhanva Gurumurthi

* Teaching Assistant at University of Virginia (Fall,2007-Spring,2008):
Courses Taken: E-Commerce Technologies, Advanced Computer Architecture, Introduction to Programming

* Lecturer, Department of CSE, BRAC University (Spring,2006-Summer,2007):
Courses Taken: Computer Architecture, Digital System Design, Microprocessors, Digital Logic Design, Artificial Intelligence, Computer Networks, Algorithms, C Programming Language

Graduate Courses

Computer Architecture, Theory of Computation, Cyber-Physical Systems, Algorithms, Statistics for Engineers and Scientists, VLSI design, Operating Systems, Advanced VLSI Systems Design, Non-Volatile Memory Systems, ASIC/SOC Design

Research

* Journals:

1. T. Siddiqua, S. Gurumurthi, "Enhancing NBTI Recovery in SRAM Arrays through Recovery Boosting", IEEE Transactions on Very Large Scale Integration Systems, 2011 (Accepted).

* Conferences and Refereed Workshops:

1. T. Siddiqua, S. Gurumurthi and M. R. Stan, “Modeling and Analyzing NBTI in the Presence of Process Variation", International Symposium on Quality Electronic Design, March 2011.
2. V. Mohan, T. Siddiqua, S. Gurumurthi and M. R. Stan, "How I Learned to Stop Worrying and Love Flash Endurance", 2nd Workshop on Hot Topics in Storage and File Systems (HotStorage), Co-located with USENIX Annual Technical Conference, June 2010.
3. T. Siddiqua, S. Gurumurthi, "Recovery Boosting: A Technique to Enhance NBTI Recovery in SRAM Arrays", IEEE Computer Society Annual Symposium on VLSI, July 2010. (Acceptance Rate=33%)
4. T. Siddiqua, S. Gurumurthi, "A Multi-Level Approach to Reduce the Impact of NBTI on Processor Functional Units", Great Lakes Symposium on VLSI, May 2010. (Acceptance Rate=18%)
5. T. Siddiqua, S. Gurumurthi, "Dynamic NBTI Management in Multicore Processor", Grace Hopper Celebration, ACM Student Research Competition, September 2009.
6. T. Siddiqua, "Balancing Soft Error Coverage with Lifetime Reliability in Redundantly Multithreaded Processors", MS Thesis , September 2009.
7. T. Siddiqua, S. Gurumurthi, "Balancing Soft Error Coverage with Lifetime Reliability in Redundantly Multithreaded Processors", International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems , September 2009. (Acceptance Rate=20%)
8. T. Siddiqua, S. Gurumurthi, "NBTI-Aware Dynamic Instruction Scheduling",
IEEE Workshop on Silicon Errors in Logic - System Effects, March 2009.

* Past Research:
1. X-member of Center for Research on Bangla Language Processing, headed by Dr. Mumit Khan ( August, 2006 – July,2007)

Awards Received

1. Spontaneous Recognition Award, Intel, 2011.
2. Cyber Physical Systems Summer School Scholarship, Georgia Institute of Tech, 2010
3. GLSVLSI Travel Grant Award, 2010
4. SRC 1st Place Winner, Grace Hopper Conference, 2009
5. Grace Hopper Scholarship from Sun Microsystem for Hardware Research, 2009
6. ISCA Travel Grant Award, 2009
7. Cash Award, Travel Grant, ACM Student Research Competition, 2009
8. Grad Cohort Travel Grant, 2009
9. CRA-W PLOSA Travel Grant, 2009
10. Golden Key Intrl. Honor Society’s Top 15% Graduate Std Award, 2008
11. Graduate Teaching Fellowship, University of Virginia
12. Dean’s Merit List Award, BUET
13. University Merit Scholarship, awarded to top 10% in a semester, BUET
14. 3rd Place and Best Female Team, The 26th ACM International Collegiate Programming Contest, Asia Regional 2001
15. Best Student Award, 1997 - S.K.B.Z. Bangladesh Islamia School.

Projects

* Analyzing Flash Reliability
* NBTI-Aware SRAM Structure Design
* Mutation Resistant Runtime Code using Kernel Attestation
* Analyzing Circuit-aware Microarchitectural Reliability
* Tiling Puzzle Solver
* Remote Configuration, Management and Usage of Sensor Network using GSM-enabled Devices
* SimHAT: Simulated Hardware-based Attestation evaluation Tool
* Turing Machine Simulator
* Intelligent Examination System
* Blood Bank Management system
* System analysis and design of Anudip Taxicab Limited
* Implementation of different layers of OSI model using serial port
* Voice recognition software
* Mail Server (SMTP&POP) and Proxy Server
* Compiler Development
* Design and implementation of a 8-bit Microprocessor/ALU/Multiplier
* Design and implementation of an NIC (network interface card )

Computer Skills

* Languages: C, C++, Java, Prolog, 80x86 Assembly language
* Database: MySQL, MS-SQL Server, MS Access, Oracle
* Operating Systems: Windows, LINUX, DOS
* Graphics Library: OpenGL
* Web Development Language: HTML, ASP, XML, PHP
* Programming Environments: MS Visual Studio.NET, Turbo C++, Kawa, Turbo Prolog, Developer 2000, Eclipse Platform, Struts
* Design and Modeling: OMT, UML
* Simulators: M5, SimpleScalar, Wattch, HotSpot, Cadence

Academic/Professional Training

* Two days workshop in CRA-W Grad Cohort, March 2009.
* Two days workshop in CRA-W/CDC PLOSA, March 2009.
* Two days workshop on ‘Educate the Educator Program’ in TARC (Training and Resource Center), Savar, Dhaka

Reviews

* Design Automation Conference (DAC), 2011, 2012
* IEEE International Symponsium on Circuits and Systems (ISCAS), 2012.
* IEEE Transactions on Computers (TC), 2011
* IEEE Transactions on Very Large Scale Integration Systems (TVLSI), 2011
* IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2011
* International Conference of Computer Aided Design (ICCAD), 2009
* Computer Architecture Letters (CAL), 2010.

Memberships

* Student member, ACM (Association for Computing Machinery), SIGARCH
* Student member, IEEE (International Organization of Electronics and Electrical Engineers), IEEE Women in Engineering
* Associate Member, Bangladesh Computer Society
* Associate Member, The Institution of Engineers, Bangladesh

References

* Available upon request