Kahng, A. B., Robins, G., and Walkup, E. A., Optimal
Algorithms for Substrate Testing in Multi-Chip Modules, in High
Performance Design Automation for Multi-Chip Modules and Packages,
J.-D. Cho and P. D. Franzon, Editors, World Scientific Publishing Co.,
1996, pp. 181-198.
Robins, G. and Zelikovsky, A. Minimum Steiner Tree Construction,
in The Handbook of Algorithms for VLSI Physical Design Automation,
C. J. Alpert, D. P. Mehta, and S. S. Sapatnekar (editors), CRC Press,
2009, Chapter 24, pp. 487-508.
Hu, J., Robins, G, and Sze C. N., Timing-Driven Interconnect
Synthesis, in The Handbook of Algorithms for VLSI Physical Design
Automation, C. J. Alpert, D. P. Mehta, and S. S. Sapatnekar (editors),
CRC Press, 2009, Chapter 25, pp. 509-534.
Bolotnyy, L, and Robins, G., Multi-tag RFID systems, in the book
"Security in RFID and Sensor Networks", Auerbach Publications, CRC
Press, Taylor & Francis Group, 2009.
Bolotnyy, L, and Robins, G., Physical Privacy and Security in
RFID Systems, in the book "Security in RFID and Sensor Networks",
Auerbach Publications, CRC Press, Taylor & Francis Group, 2009.
Bolotnyy, L, and Robins, G., "Generalized and Inter-Tag
Communication", in the book "Development and Implementation of RFID
Technology", In-Tech Publishers, Vienna, Austria, 2009.
Java Program Design: Third Edition, J.P. Cohoon and
J. W. Davidson, McGraw-Hill, 2006. Seeks to attract a diverse audience
to computing through motivating examples.
Varanelli, J. M., Cohoon, J. P., and Martin, W. N., ,
Population-oriented Simulated Annealing: an evolutionary thermodynamic
hybrid approach to Very Large-Scale Integration Network Partitioning,
Handbook of Evolutionary Computation, Oxford University Press, to
appear.
Martin, W. N., Lienig, J., and Cohoon, J. P., Parallel Genetic
Algorithms Based on Punctuated Equilibria, Handbook of Evolutionary
Computation, Oxford University Press, to appear.
Cohoon, J. P., and Ganley, J. L., Rectilinear Interconnections In
the Presence of Obstacles, in Routing in Electronic Modules,
Y. T. Wong and M. Pecht (Editors), CRC Press, New York, NY, March
1996.
Journal Papers
Foster, L., and Robins, G., Solution to a Number Theory
Problem, American Mathematical Monthly, Vol. 89, No. 7, Aug-Sep, 1982,
pp. 499-500.
Kahng, A. B., and Robins, G., Optimal Algorithms for Extracting
Spatial Regularity in Images, Pattern Recognition Letters, 12,
December 1991, pp. 757-764.
Cong, J., Kahng A. B., Robins, G., Sarrafzadeh, M., and Wong, C.
K., Provably-Good
Performance-Driven Global Routing, IEEE Transactions on
Computer-Aided Design of Integrated Circuits and Systems, Vol. 11,
No. 6, June 1992, pp. 739-752.
Hu, T. C., Kahng, A. B., and Robins, G., Solution of the
Discrete Plateau Problem, Proceedings of the National Academy of
Sciences, Vol. 89, October 1992, pp. 9235-9236.
Alpert, C., Cong, J., Kahng, A. B., Robins, G., and M.
Sarrafzadeh, On
the Minimum Density Interconnection Tree Problem, VLSI Design: an
International Journal of Custom-Chip Design, Simulation, and Testing,
Vol. 2, No. 2, February 1994, pp. 157-169.
Robins, G., and Salowe, J. S., Low-Degree
Minimum Spanning Trees, Discrete and Computational Geometry,
Vol. 14, September 1995, pp. 151-165.
McCoy, B. A., and Robins, G., Non-Tree
Routing, IEEE Transactions on Computer-Aided Design of Integrated
Circuits and Systems, Vol. 14, No. 6, June 1995, pp. 780-784.
Journal scanned/OCRed version
Kahng, A. B., Robins, G., Singh, A., and Zelikovsky, A., Filling
Algorithms and Analyses for Layout Density Control, IEEE
Transactions on Computer-Aided Design of Integrated Circuits and
Systems, Vol. 18, No. 4, April 1999, pp. 445-462.
Chen, Y., Kahng, A. B., Robins, G., and Zelikovsky, A., Area
Fill Synthesis for Uniform Layout Density, IEEE Transactions on
Computer-Aided Design of Integrated Circuits and Systems, Vol. 21,
No. 10, October 2002, pp. 1132-1147.
Chen, Y., Kahng, A. B., Robins, G., Zelikovsky, A., and Zheng,
Y., Compressible
Area Fill Synthesis, IEEE Transactions on Computer-Aided Design of
Integrated Circuits and Systems, Vol. 24, No. 8, pp. 1169-1187,
2005.
Chen, Y., Kahng, A. B., Robins, G., Zelikovsky, A., and Zheng,
Y., Closing the Smoothness and Uniformity Gap in Area Fill Synthesis,
to appear in ACM Transactions on Design Automation of Electronic
Systems.
Bolotnyy, L. and Robins, G., Multi-Tag
RFID Systems, International Journal of Internet Protocol
Technology, special issue on RFID: Technologies, Applications, and
Trends, Vol 2, No 3/4, December, 2007, pp. 218-231. Invited
paper
A Fast Method for Generalized Starting Temperature Determination
in Homogeneous Two-Stage Simulated Annealing Systems, J. M. Varanelli
and J. P. Cohoon, Computers and Operations Research, pp. 481-503,
1999.
Distributed Genetic Algorithms for the Floorplan Design Problem,
J. P. Cohoon, S. U. Hegde, W. N. Martin, and D. S. Richards, IEEE
Transactions on Computer-Aided Design of Integrated Circuits and
Systems, April 1991, pp. 483-492.
An Optimal Steiner Tree Algorithm for a Net Whose Terminals Lie on
the Perimeter of a Rectangle, J. P. Cohoon, J. S. Salowe, and
D. S. Richards, IEEE Transactions on Computer-Aided Design of
Integrated Circuits and Systems, April 1990, pp. 398-407.
Beaver: A Computational-Geometry-Based Tool for Switchbox Routing,
J. P. Cohoon and P. L. Heck, IEEE Transactions on Computer-Aided
Design of Integrated Circuits and Systems, June 1988,
pp. 684-697.
Conference Papers
Kaczmarek, T., Bates, R., and Robins, G., Recent Developments in
NIKL, American Association of Artificial Intelligence, Proc. Fifth
National Conference on Artificial Intelligence, Philadelphia,
Pennsylvania, August 1986, pp. 978-985.
Robins, G., Applications of The
ISI Grapher, Proc. Fourth Annual Artificial Intelligence and
Advanced Computer Conference, Long Beach, California, May 1988,
pp. 105-130.
Kahng, A. B., and Robins, G., Optimal Algorithms for Determining
Regularity in Pointsets, Proc. Canadian Conference on Computational
Geometry, Vancouver, August 1991, pp. 167-170.
Cong, J., Kahng, A. B., and Robins, G., On Clock Routing For
General Cell Layouts, Proc. IEEE International ASIC Conference,
Rochester, September 1991, pp. P14:5.1-P14:5.4.
Cong, J., Kahng, A. B., Robins, G., M. Sarrafzadeh and C. K.
Wong, Performance-Driven Global Routing for Cell Based IC's, Proc.
IEEE International Conference on Computer Design, Cambridge, October
1991, pp. 170-173.
Cong, J., Kahng, A. B., Robins, G., M. Sarrafzadeh and C. K.
Wong, Provably-Good Algorithms for Performance-Driven Global Routing,
Proc. IEEE International Symposium on Circuits and Systems, San Diego,
May 1992, pp. 2240-2243.
Kahng, A. B., Robins, G. and Walkup, E. A., New Results and
Algorithms for MCM Substrate Testing, Proc. IEEE International
Symposium on Circuits and Systems, San Diego, May 1992, pp.
1113-1116.
Alpert, C., Cong, J., Kahng, A. B., Robins, G., and Sarrafzadeh,
M., Minimum
Density Interconnection Trees, Proc. IEEE International Symposium
on Circuits and Systems, Chicago, May 1993, pp. 1865-1868.
Barrera, T., Griffith, J., McKee, S. A., Robins, G., and Zhang,
T., Toward a Steiner Engine: Enhanced Serial and Parallel
Implementations of the Iterated 1-Steiner MRST Algorithm, Proc. Great
Lakes Symposium on VLSI, Kalamazoo, MI, March 1993, pp. 90-94. Steiner code (UNIX
tar format)
Boese, K. D., Kahng, A. B., McCoy, B. A. and Robins, G., Toward
Optimal Routing Trees, Proc. ACM/SIGDA Physical Design Workshop,
Lake Arrowhead, CA, April 1993, pp. 44-51.
Barrera, T., Griffith, J., Robins, G., and Zhang, T., Narrowing
the Gap: Near-Optimal Steiner Trees in Polynomial Time, Proc. IEEE
International ASIC Conference, Rochester, September 1993, pp. 87-90.
Steiner code
(UNIX tar format)
McCoy, B. A., and Robins, G., Non-Tree
Routing, Proc. European Design Automation Conference, Paris,
France, February 1994, pp. 430-434.
Alexander, M. J., and Robins, G., A Unified New Approach to FPGA
Routing Based on Multi-Weighted Graphs, Proc. ACM/SIGDA International
Workshop on Field-Programmable Gate Arrays, Berkeley, CA, February
1994.
Alexander, M. J., and Robins, G., High Performance Routing for
Field-Programmable Gate Arrays, Proc. IEEE International ASIC
Conference, Rochester, NY, September 1994, pp. 138-141.
Robins, G., and Robinson, B. L.,
Pattern Minefield Detection from Inexact Data, Proc. SPIE
International Symposium on Aerospace/Defense Sensing and Dual-Use
Photonics, Volume 2496, Orlando, FL, April 1995, pp. 568-574.
Alexander, M. J., Cohoon, J. P., Colflesh, J. L., Karro, J., and
Robins, G., Three-Dimensional
Field Programmable Gate Arrays, Proc. IEEE International ASIC
Conference, Austin, TX, September 1995, pp. 253-256.
Alexander, M. J., Cohoon, J. P., Colflesh, J. L., Karro, J.,
Peters, E. L. and Robins, G., Physical Layout for Three-Dimensional
FPGAs, 1996 ACM/SIGDA Physical Design Workshop, Reston, VA, April,
1996, pp. 142-149.
Alexander, M. J., Cohoon, J. P., Colflesh, J. L., Karro, J.,
Peters, E. L. and Robins, G.,
Placement and Routing for Three-Dimensional FPGAs, Fourth Canadian
Workshop on Field-Programmable Devices, Toronto, Canada, May, 1996,
pp. 11-18.
Kahng, A. B., Robins, G., Singh, A., Wang, H., and Zelikovsky,
A., Filling
and Slotting: Analysis and Algorithms, Proc. International
Symposium on Physical Design, Monterey, California, April, 1998,
pp. 95-102.
Helvig, C. S., Robins, G., and Zelikovsky, A., Moving-Target
TSP and Related Problems, Proc. European Symposium on
Algorithms, Venice, Italy, August, 1998, pp. 453-464, published
as Lecture Notes in Computer Science, 1461, G. Bilardi,
G. F. Italiano, A. Pietracaprina and G. Pucci (eds.), 1998.
Ganely, L. J., and Cohoon, J. P., A Provably Good Moat Routing
Algorithm, Proc. Sixth Great Lakes Symposium on VLSI, pp. 86-91,
1996.
Ganely, L. J., and Cohoon, J. P., Optimal Rectilinear Steiner
Minimal Trees in O(n^2 2.62^n) Time, Proc. Sixth Canadian Conference
on Computational Geometry, pp. 308-313, 1994.
Ganely, L. J., and Cohoon, J. P., Routing a Multi-Terminal
Critical Net: Steiner Tree Construction in the Presence of Obstacles,
Proc. IEEE International Symposium on Circuits and Systems, London,
pp. 113-116, 1994.
A. Sarkhar, R. Waxman, and J. P. Cohoon, System Design Utilizing
Integrated Specification and Performance Models, ACM-IEEE VHDL
International Users Forum, Oakland, CA, May 1994, pp. 90-100.
J. C. Prey, J. P. Cohoon, and G. Fife, Software Engineering
Beginning in the First Computer Science Course, SEI Conference on
Software Engineering Education, San Antonio, TX, December 1993.
J. Varanelli and J. P. Cohoon, Two-Stage Simulated Annealing, ACM
Physical Design Workshop, Lake Arrowhead, CA, April 1993.
Ganely, L. J., and Cohoon, J. P., A Faster Dynamic Programming
Algorithm for Exact Rectilinear Steiner Minimal Trees, Proc. Fourth
Great Lakes Symposium on VLSI, pp. 238-241, 1994.
Ganely, L. J., and Cohoon, J. P., Thumbnail Rectilinear Steiner
Trees, Proc. Fifth Great Lakes Symposium on VLSI, pp. 46-49, 1995.
Focusing
on Partnerships, Impact - Engineering That Makes a
Difference, School of Engineering and Applies Science, UVa, Spring
Issue, Volume 4, Number 3, March 2002, p. 1.