"I am a person who works hard and plays hard."

Yuan Wei
Second Year Graduate Student Department of Computer Science
University of Virginia Charlottesville, VA 22903
Email: yw3f@cs.virginia.edu

Source Code Analysis
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alpha.def File Reference

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Defines

#define LDA_IMPL
#define LDAH_IMPL
#define LDBU_IMPL
#define LDQ_U_IMPL
#define LDWU_IMPL
#define STW_IMPL
#define STB_IMPL
#define STQ_U_IMPL
#define FLTV_IMPL
#define LDF_IMPL
#define LDG_IMPL
#define LDS_IMPL
#define LDT_IMPL
#define STF_IMPL
#define STG_IMPL
#define STS_IMPL
#define STT_IMPL
#define LDL_IMPL
#define LDQ_IMPL
#define LDL_L_IMPL
#define LDQ_L_IMPL
#define STL_IMPL
#define STQ_IMPL
#define STL_C_IMPL
#define STQ_C_IMPL
#define BR_IMPL
#define FBEQ_IMPL
#define FBLT_IMPL
#define FBLE_IMPL
#define BSR_IMPL
#define FBNE_IMPL
#define FBGE_IMPL
#define FBGT_IMPL
#define BLBC_IMPL
#define BEQ_IMPL
#define BLT_IMPL
#define BLE_IMPL
#define BLBS_IMPL
#define BNE_IMPL
#define BGE_IMPL
#define BGT_IMPL
#define PAL_CALLSYS_IMPL
#define PAL_RDUNIQ_IMPL
#define PAL_WRUNIQ_IMPL
#define ADDL_IMPL
#define ADDLI_IMPL
#define S4ADDL_IMPL
#define S4ADDLI_IMPL
#define SUBL_IMPL
#define SUBLI_IMPL
#define S4SUBL_IMPL
#define S4SUBLI_IMPL
#define CMPBGE_IMPL
#define CMPBGEI_IMPL
#define S8ADDL_IMPL
#define S8ADDLI_IMPL
#define S8SUBL_IMPL
#define S8SUBLI_IMPL
#define CMPULT_IMPL
#define CMPULTI_IMPL
#define ADDQ_IMPL
#define ADDQI_IMPL
#define S4ADDQ_IMPL
#define S4ADDQI_IMPL
#define SUBQ_IMPL
#define SUBQI_IMPL
#define S4SUBQ_IMPL
#define S4SUBQI_IMPL
#define CMPEQ_IMPL
#define CMPEQI_IMPL
#define S8ADDQ_IMPL
#define S8ADDQI_IMPL
#define S8SUBQ_IMPL
#define S8SUBQI_IMPL
#define CMPULE_IMPL
#define CMPULEI_IMPL
#define ADDLV_IMPL
#define ADDLVI_IMPL
#define SUBLV_IMPL
#define SUBLVI_IMPL
#define CMPLT_IMPL
#define CMPLTI_IMPL
#define ADDQV_IMPL
#define ADDQVI_IMPL
#define SUBQV_IMPL
#define SUBQVI_IMPL
#define CMPLE_IMPL
#define CMPLEI_IMPL
#define IMPLVER_IMPL
#define AND_IMPL
#define ANDI_IMPL
#define BIC_IMPL
#define BICI_IMPL
#define CMOVLBS_IMPL
#define CMOVLBSI_IMPL
#define CMOVLBC_IMPL
#define CMOVLBCI_IMPL
#define BIS_IMPL
#define BISI_IMPL
#define CMOVEQ_IMPL
#define CMOVEQI_IMPL
#define CMOVNE_IMPL
#define CMOVNEI_IMPL
#define ORNOT_IMPL
#define ORNOTI_IMPL
#define XOR_IMPL
#define XORI_IMPL
#define CMOVLT_IMPL
#define CMOVLTI_IMPL
#define CMOVGE_IMPL
#define CMOVGEI_IMPL
#define EQV_IMPL
#define EQVI_IMPL
#define AMASK_IMPL
#define AMASKI_IMPL
#define CMOVLE_IMPL
#define CMOVLEI_IMPL
#define CMOVGT_IMPL
#define CMOVGTI_IMPL
#define MSKBL_IMPL
#define MSKBLI_IMPL
#define EXTBL_IMPL
#define EXTBLI_IMPL
#define INSBL_IMPL
#define INSBLI_IMPL
#define MSKWL_IMPL
#define MSKWLI_IMPL
#define EXTWL_IMPL
#define EXTWLI_IMPL
#define INSWL_IMPL
#define INSWLI_IMPL
#define MSKLL_IMPL
#define MSKLLI_IMPL
#define EXTLL_IMPL
#define EXTLLI_IMPL
#define INSLL_IMPL
#define INSLLI_IMPL
#define ZAP_IMPL
#define ZAPI_IMPL
#define ZAPNOT_IMPL
#define ZAPNOTI_IMPL
#define MSKQL_IMPL
#define MSKQLI_IMPL
#define SRL_IMPL
#define SRLI_IMPL
#define EXTQL_IMPL
#define EXTQLI_IMPL
#define SLL_IMPL
#define SLLI_IMPL
#define INSQL_IMPL
#define INSQLI_IMPL
#define SRA_IMPL
#define SRAI_IMPL
#define MSKWH_IMPL
#define MSKWHI_IMPL
#define INSWH_IMPL
#define INSWHI_IMPL
#define EXTWH_IMPL
#define EXTWHI_IMPL
#define MSKLH_IMPL
#define MSKLHI_IMPL
#define INSLH_IMPL
#define INSLHI_IMPL
#define EXTLH_IMPL
#define EXTLHI_IMPL
#define MSKQH_IMPL
#define MSKQHI_IMPL
#define INSQH_IMPL
#define INSQHI_IMPL
#define EXTQH_IMPL
#define EXTQHI_IMPL
#define MULL_IMPL
#define MULLI_IMPL
#define MULQ_IMPL
#define MULQI_IMPL
#define UMULH_IMPL
#define UMULHI_IMPL
#define ITOFS_IMPL
#define SQRTF_IMPL
#define SQRTS_IMPL
#define ITOFF_IMPL
#define ITOFT_IMPL
#define SQRTG_IMPL
#define SQRTT_IMPL
#define ADDS_IMPL
#define SUBS_IMPL
#define MULS_IMPL
#define DIVS_IMPL
#define ADDT_IMPL
#define SUBT_IMPL
#define MULT_IMPL
#define DIVT_IMPL
#define CMPTUN_IMPL
#define CMPTEQ_IMPL
#define CMPTLT_IMPL
#define CMPTLE_IMPL
#define CVTTS_IMPL
#define CVTTQ_IMPL
#define CVTQS_IMPL
#define CVTQT_IMPL
#define CVTLQ_IMPL
#define CPYS_IMPL
#define CPYSN_IMPL
#define CPYSE_IMPL
#define MT_FPCR_IMPL
#define MF_FPCR_IMPL
#define FCMOVEQ_IMPL
#define FCMOVNE_IMPL
#define FCMOVLT_IMPL
#define FCMOVGE_IMPL
#define FCMOVLE_IMPL
#define FCMOVGT_IMPL
#define CVTQL_IMPL
#define TRAPB_IMPL
#define EXCB_IMPL
#define MB_IMPL
#define WMB_IMPL
#define FETCH_IMPL
#define FETCH_M_IMPL
#define RPCC_IMPL
#define _RC_IMPL
#define ECB_IMPL
#define _RS_IMPL
#define WH64_IMPL
#define JMP_IMPL
#define JSR_IMPL
#define RETN_IMPL
#define JSR_COROUTINE_IMPL
#define CTPOP_IMPL
#define PERR_IMPL
#define CTLZ_IMPL
#define CTTZ_IMPL
#define UNPKBW_IMPL
#define UNPKBL_IMPL
#define PKWB_IMPL
#define PKLB_IMPL
#define FTOIT_IMPL
#define FTOIS_IMPL
#define MINSB8_IMPL
#define MINSB8I_IMPL
#define MINSW4_IMPL
#define MINSW4I_IMPL
#define MINUB8_IMPL
#define MINUB8I_IMPL
#define MINUW4_IMPL
#define MINUW4I_IMPL
#define MAXUB8_IMPL
#define MAXUB8I_IMPL
#define MAXUW4_IMPL
#define MAXUW4I_IMPL
#define MAXSB8_IMPL
#define MAXSB8I_IMPL
#define MAXSW4_IMPL
#define MAXSW4I_IMPL
#define SEXTB_IMPL
#define SEXTBI_IMPL
#define SEXTW_IMPL
#define SEXTWI_IMPL

Functions

DEFINST (LDA, 0x08,"lda","a, o(b)", IntALU, F_ICOMP, DGPR(RA), DNA, DNA, DGPR(RB), DNA)#define LDAH_IMPL DEFINST(LDAH
o (b)"
DGPR (RA)
DEFINST (LDBU, 0x0a,"ldbu","a, o(b)", RdPort, F_MEM|F_LOAD|F_DISP, DGPR(RA), DNA, DNA, DGPR(RB), DNA)#define LDQ_U_IMPL DEFINST(LDQ_U
DEFINST (LDWU, 0x0c,"ldwu","a, o(b)", RdPort, F_MEM|F_LOAD|F_DISP, DGPR(RA), DNA, DNA, DGPR(RB), DNA)#define STW_IMPL DEFINST(STW
DEFINST (STB, 0x0e,"stb","a, o(b)", WrPort, F_MEM|F_STORE|F_DISP, DNA, DNA, DGPR(RA), DGPR(RB), DNA)#define STQ_U_IMPL DEFINST(STQ_U
DEFINST (FLTV, 0x15,"fltv(unimpl)","", NA, NA, DNA, DNA, DNA, DNA, DNA)#define LDF_IMPL DEFINST(LDF
ldf (unimpl)"
DEFINST (LDG, 0x21,"ldg(unimpl)","", NA, NA, DNA, DNA, DNA, DNA, DNA)#define LDS_IMPL DEFINST(LDS
F_MEM F_LOAD DFPR (RA)
DEFINST (LDT, 0x23,"ldt","A, o(b)", RdPort, F_MEM|F_LOAD|F_DISP, DFPR(RA), DNA, DNA, DGPR(RB), DNA)#define STF_IMPL DEFINST(STF
stf (unimpl)"
DEFINST (STG, 0x25,"stg(unimpl)","", NA, NA, DNA, DNA, DNA, DNA, DNA)#define STS_IMPL DEFINST(STS
DEFINST (STT, 0x27,"stt","A, o(b)", WrPort, F_MEM|F_STORE|F_DISP, DNA, DNA, DFPR(RA), DGPR(RB), DNA)#define LDL_IMPL DEFINST(LDL
DEFINST (LDQ, 0x29,"ldq","a, o(b)", RdPort, F_MEM|F_LOAD|F_DISP, DGPR(RA), DNA, DNA, DGPR(RB), DNA)#define LDL_L_IMPL DEFINST(LDL_L
ldl_l (unimpl)"
DEFINST (LDQ_L, 0x2b,"ldq_l(unimpl)","a, o(b)", RdPort, F_MEM|F_LOAD|F_DISP, DGPR(RA), DNA, DNA, DGPR(RB), DNA)#define STL_IMPL DEFINST(STL
DEFINST (STQ, 0x2d,"stq","a, o(b)", WrPort, F_MEM|F_STORE|F_DISP, DNA, DNA, DGPR(RA), DGPR(RB), DNA)#define STL_C_IMPL DEFINST(STL_C
stl_c (unimpl)"
DEFINST (STQ_C, 0x2f,"stq_c(unimpl)","a, o(b)", WrPort, F_MEM|F_STORE|F_DISP, DNA, DNA, DGPR(RA), DGPR(RB), DNA)#define BR_IMPL DEFINST(BR
DEFINST (FBEQ, 0x31,"fbeq","A, j", FloatADD, F_CTRL|F_COND|F_DIRJMP, DNA, DNA, DFPR(RA), DNA, DNA)#define FBLT_IMPL DEFINST(FBLT
DEFINST (FBLE, 0x33,"fble","A, j", FloatADD, F_CTRL|F_COND|F_DIRJMP, DNA, DNA, DFPR(RA), DNA, DNA)#define BSR_IMPL DEFINST(BSR
DEFINST (FBNE, 0x35,"fbne","A, j", FloatADD, F_CTRL|F_COND|F_DIRJMP, DNA, DNA, DFPR(RA), DNA, DNA)#define FBGE_IMPL DEFINST(FBGE
DEFINST (FBGT, 0x37,"fbgt","A, j", FloatADD, F_CTRL|F_COND|F_DIRJMP, DNA, DNA, DFPR(RA), DNA, DNA)#define BLBC_IMPL DEFINST(BLBC
DEFINST (BEQ, 0x39,"beq","a, j", IntALU, F_CTRL|F_COND|F_DIRJMP, DNA, DNA, DGPR(RA), DNA, DNA)#define BLT_IMPL DEFINST(BLT
DEFINST (BLE, 0x3b,"ble","a, j", IntALU, F_CTRL|F_COND|F_DIRJMP, DNA, DNA, DGPR(RA), DNA, DNA)#define BLBS_IMPL DEFINST(BLBS
DEFINST (BNE, 0x3d,"bne","a, j", IntALU, F_CTRL|F_COND|F_DIRJMP, DNA, DNA, DGPR(RA), DNA, DNA)#define BGE_IMPL DEFINST(BGE
DEFINST (BGT, 0x3f,"bgt","a, j", IntALU, F_CTRL|F_COND|F_DIRJMP, DNA, DNA, DGPR(RA), DNA, DNA)#define PAL_CALLSYS_IMPL DEFINST(PAL_CALLSYS
DEFINST (PAL_RDUNIQ, 0x9e,"call_pal rduniq","", NA, F_TRAP, DGPR(0), DNA, DUNIQ, DNA, DNA)#define PAL_WRUNIQ_IMPL DEFINST(PAL_WRUNIQ
call_pal DGPR (16)
DEFINST (ADDL, 0x00,"addl","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define ADDLI_IMPL DEFINST(ADDLI
DEFINST (S4ADDL, 0x00,"s4addl","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define S4ADDLI_IMPL DEFINST(S4ADDLI
DEFINST (SUBL, 0x00,"subl","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define SUBLI_IMPL DEFINST(SUBLI
DEFINST (S4SUBL, 0x00,"s4subl","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define S4SUBLI_IMPL DEFINST(S4SUBLI
DEFINST (CMPBGE, 0x00,"cmpbge","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define CMPBGEI_IMPL DEFINST(CMPBGEI
DEFINST (S8ADDL, 0x00,"s8addl","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define S8ADDLI_IMPL DEFINST(S8ADDLI
DEFINST (S8SUBL, 0x00,"s8subl","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define S8SUBLI_IMPL DEFINST(S8SUBLI
DEFINST (CMPULT, 0x00,"cmpult","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define CMPULTI_IMPL DEFINST(CMPULTI
DEFINST (ADDQ, 0x00,"addq","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define ADDQI_IMPL DEFINST(ADDQI
DEFINST (S4ADDQ, 0x00,"s4addq","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define S4ADDQI_IMPL DEFINST(S4ADDQI
DEFINST (SUBQ, 0x00,"subq","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define SUBQI_IMPL DEFINST(SUBQI
DEFINST (S4SUBQ, 0x00,"s4subq","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define S4SUBQI_IMPL DEFINST(S4SUBQI
DEFINST (CMPEQ, 0x00,"cmpeq","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define CMPEQI_IMPL DEFINST(CMPEQI
DEFINST (S8ADDQ, 0x00,"s8addq","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define S8ADDQI_IMPL DEFINST(S8ADDQI
DEFINST (S8SUBQ, 0x00,"s8subq","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define S8SUBQI_IMPL DEFINST(S8SUBQI
DEFINST (CMPULE, 0x00,"cmpule","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define CMPULEI_IMPL DEFINST(CMPULEI
DEFINST (ADDLV, 0x00,"addl/v(unimpl)","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define ADDLVI_IMPL DEFINST(ADDLVI
addl v (unimpl)"
DEFINST (SUBLV, 0x00,"subl/v(unimpl)","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define SUBLVI_IMPL DEFINST(SUBLVI
DEFINST (CMPLT, 0x00,"cmplt","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define CMPLTI_IMPL DEFINST(CMPLTI
DEFINST (ADDQV, 0x00,"addq/v(unimpl)","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define ADDQVI_IMPL DEFINST(ADDQVI
DEFINST (SUBQV, 0x00,"subq/v(unimpl)","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define SUBQVI_IMPL DEFINST(SUBQVI
DEFINST (CMPLE, 0x00,"cmple","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define CMPLEI_IMPL DEFINST(CMPLEI
F_ICOMP DNA DEFLINK (BIC_LINK, 0x08,"bic_link", 12, 1)#define IMPLVER_IMPL DEFINST(IMPLVER
DEFINST (AND, 0x00,"and","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define ANDI_IMPL DEFINST(ANDI
DEFINST (BIC, 0x00,"bic","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define BICI_IMPL DEFINST(BICI
DEFINST (CMOVLBS, 0x00,"cmovlbs","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define CMOVLBSI_IMPL DEFINST(CMOVLBSI
DEFINST (CMOVLBC, 0x00,"cmovlbc","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define CMOVLBCI_IMPL DEFINST(CMOVLBCI
DEFINST (BIS, 0x00,"bis","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define BISI_IMPL DEFINST(BISI
DEFINST (CMOVEQ, 0x00,"cmoveq","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define CMOVEQI_IMPL DEFINST(CMOVEQI
DEFINST (CMOVNE, 0x00,"cmovne","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define CMOVNEI_IMPL DEFINST(CMOVNEI
DEFINST (ORNOT, 0x00,"ornot","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define ORNOTI_IMPL DEFINST(ORNOTI
DEFINST (XOR, 0x00,"xor","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define XORI_IMPL DEFINST(XORI
DEFINST (CMOVLT, 0x00,"cmovlt","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define CMOVLTI_IMPL DEFINST(CMOVLTI
DEFINST (CMOVGE, 0x00,"cmovge","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define CMOVGEI_IMPL DEFINST(CMOVGEI
DEFINST (EQV, 0x00,"eqv","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define EQVI_IMPL DEFINST(EQVI
DEFINST (AMASK, 0x00,"amask","b, c", NA, NA, DGPR(RC), DNA, DGPR(RB), DNA, DNA)#define AMASKI_IMPL DEFINST(AMASKI
DEFINST (CMOVLE, 0x00,"cmovle","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define CMOVLEI_IMPL DEFINST(CMOVLEI
DEFINST (CMOVGT, 0x00,"cmovgt","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define CMOVGTI_IMPL DEFINST(CMOVGTI
DEFINST (MSKBL, 0x00,"mskbl","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define MSKBLI_IMPL DEFINST(MSKBLI
DEFINST (EXTBL, 0x00,"extbl","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define EXTBLI_IMPL DEFINST(EXTBLI
DEFINST (INSBL, 0x00,"insbl","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define INSBLI_IMPL DEFINST(INSBLI
DEFINST (MSKWL, 0x00,"mskwl","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define MSKWLI_IMPL DEFINST(MSKWLI
DEFINST (EXTWL, 0x00,"extwl","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define EXTWLI_IMPL DEFINST(EXTWLI
DEFINST (INSWL, 0x00,"inswl","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define INSWLI_IMPL DEFINST(INSWLI
DEFINST (MSKLL, 0x00,"mskll","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define MSKLLI_IMPL DEFINST(MSKLLI
DEFINST (EXTLL, 0x00,"extll","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define EXTLLI_IMPL DEFINST(EXTLLI
DEFINST (INSLL, 0x00,"insll","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define INSLLI_IMPL DEFINST(INSLLI
DEFINST (ZAP, 0x00,"zap","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define ZAPI_IMPL DEFINST(ZAPI
DEFINST (ZAPNOT, 0x00,"zapnot","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define ZAPNOTI_IMPL DEFINST(ZAPNOTI
DEFINST (MSKQL, 0x00,"mskql","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define MSKQLI_IMPL DEFINST(MSKQLI
DEFINST (SRL, 0x00,"srl","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define SRLI_IMPL DEFINST(SRLI
DEFINST (EXTQL, 0x00,"extql","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define EXTQLI_IMPL DEFINST(EXTQLI
DEFINST (SLL, 0x00,"sll","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define SLLI_IMPL DEFINST(SLLI
DEFINST (INSQL, 0x00,"insql","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define INSQLI_IMPL DEFINST(INSQLI
DEFINST (SRA, 0x00,"sra","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define SRAI_IMPL DEFINST(SRAI
DEFINST (MSKWH, 0x00,"mskwh","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define MSKWHI_IMPL DEFINST(MSKWHI
DEFINST (INSWH, 0x00,"inswh","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define INSWHI_IMPL DEFINST(INSWHI
DEFINST (EXTWH, 0x00,"extwh","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define EXTWHI_IMPL DEFINST(EXTWHI
DEFINST (MSKLH, 0x00,"msklh","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define MSKLHI_IMPL DEFINST(MSKLHI
DEFINST (INSLH, 0x00,"inslh","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define INSLHI_IMPL DEFINST(INSLHI
DEFINST (EXTLH, 0x00,"extlh","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define EXTLHI_IMPL DEFINST(EXTLHI
DEFINST (MSKQH, 0x00,"mskqh","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define MSKQHI_IMPL DEFINST(MSKQHI
DEFINST (INSQH, 0x00,"insqh","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define INSQHI_IMPL DEFINST(INSQHI
DEFINST (EXTQH, 0x00,"extqh","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define EXTQHI_IMPL DEFINST(EXTQHI
DEFINST (MULL, 0x00,"mull","a, b, c", IntMULT, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define MULLI_IMPL DEFINST(MULLI
DEFINST (MULQ, 0x00,"mulq","a, b, c", IntMULT, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define MULQI_IMPL DEFINST(MULQI
DEFINST (UMULH, 0x00,"umulh","a, b, c", IntMULT, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define UMULHI_IMPL DEFINST(UMULHI
DEFINST (ITOFS, 0x04,"itofs","a, C", FloatCVT, F_FCOMP, DFPR(RC), DNA, DGPR(RA), DNA, DNA)#define SQRTF_IMPL DEFINST(SQRTF
sqrtf (unimpl)"
DEFINST (SQRTS, 0x0b,"sqrts","B, C", FloatSQRT, F_FCOMP, DFPR(RC), DNA, DFPR(RB), DNA, DNA)#define ITOFF_IMPL DEFINST(ITOFF
itoff (unimpl)"
DEFINST (ITOFT, 0x24,"itoft","a, C", FloatCVT, F_FCOMP, DFPR(RC), DNA, DGPR(RA), DNA, DNA)#define SQRTG_IMPL DEFINST(SQRTG
sqrtg (unimpl)"
DEFINST (SQRTT, 0x2b,"sqrtt","B, C", NA, NA, DFPR(RC), DNA, DFPR(RB), DNA, DNA)#define ADDS_IMPL DEFINST(ADDS
DEFINST (SUBS, 0x01,"subs","A, B, C", FloatADD, F_FCOMP, DFPR(RC), DNA, DFPR(RA), DFPR(RB), DNA)#define MULS_IMPL DEFINST(MULS
DEFINST (DIVS, 0x03,"divs","A, B, C", FloatDIV, F_FCOMP, DFPR(RC), DNA, DFPR(RA), DFPR(RB), DNA)#define ADDT_IMPL DEFINST(ADDT
DEFINST (SUBT, 0x21,"subt","A, B, C", FloatADD, F_FCOMP, DFPR(RC), DNA, DFPR(RA), DFPR(RB), DNA)#define MULT_IMPL DEFINST(MULT
DEFINST (DIVT, 0x23,"divt","A, B, C", FloatDIV, F_FCOMP, DFPR(RC), DNA, DFPR(RA), DFPR(RB), DNA)#define CMPTUN_IMPL DEFINST(CMPTUN
DEFINST (CMPTEQ, 0x25,"cmpteq","A, B, C", FloatADD, F_FCOMP, DFPR(RC), DNA, DFPR(RA), DFPR(RB), DNA)#define CMPTLT_IMPL DEFINST(CMPTLT
DEFINST (CMPTLE, 0x27,"cmptle","A, B, C", FloatADD, F_FCOMP, DFPR(RC), DNA, DFPR(RA), DFPR(RB), DNA)#define CVTTS_IMPL DEFINST(CVTTS
DEFINST (CVTTQ, 0x2f,"cvttq","B, C", FloatADD, F_FCOMP, DFPR(RC), DNA, DFPR(RB), DNA, DNA)#define CVTQS_IMPL DEFINST(CVTQS
DEFINST (CVTQT, 0x3e,"cvtqt","B, C", FloatADD, F_FCOMP, DFPR(RC), DNA, DFPR(RB), DNA, DNA)#define CVTLQ_IMPL DEFINST(CVTLQ
DEFINST (CPYS, 0x20,"cpys","A, B, C", FloatADD, F_FCOMP, DFPR(RC), DNA, DFPR(RA), DFPR(RB), DNA)#define CPYSN_IMPL DEFINST(CPYSN
DEFINST (CPYSE, 0x22,"cpyse","A, B, C", FloatADD, F_FCOMP, DFPR(RC), DNA, DFPR(RA), DFPR(RB), DNA)#define MT_FPCR_IMPL DEFINST(MT_FPCR
DEFINST (MF_FPCR, 0x25,"mf_fpcr","A", FloatADD, F_FCOMP, DFPR(RA), DNA, DFPCR, DNA, DNA)#define FCMOVEQ_IMPL DEFINST(FCMOVEQ
DEFINST (FCMOVNE, 0x2b,"fcmovne","A, B, C", FloatADD, F_FCOMP, DFPR(RC), DNA, DFPR(RA), DFPR(RB), DNA)#define FCMOVLT_IMPL DEFINST(FCMOVLT
DEFINST (FCMOVGE, 0x2d,"fcmovge","A, B, C", FloatADD, F_FCOMP, DFPR(RC), DNA, DFPR(RA), DFPR(RB), DNA)#define FCMOVLE_IMPL DEFINST(FCMOVLE
DEFINST (FCMOVGT, 0x2f,"fcmovgt","A, B, C", FloatADD, F_FCOMP, DFPR(RC), DNA, DFPR(RA), DFPR(RB), DNA)#define CVTQL_IMPL DEFINST(CVTQL
DEFINST (TRAPB, 0x00,"trapb","", NA, F_TRAP, DNA, DNA, DNA, DNA, DNA)#define EXCB_IMPL DEFINST(EXCB
DEFINST (MB, 0x40,"mb","", NA, F_TRAP, DNA, DNA, DNA, DNA, DNA)#define WMB_IMPL DEFINST(WMB
DEFINST (FETCH, 0x80,"fetch","0(b)", NA, NA, DNA, DNA, DNA, DNA, DNA)#define FETCH_M_IMPL DEFINST(FETCH_M
DEFINST (RPCC, 0xc0,"rpcc","a", NA, NA, DGPR(RA), DNA, DNA, DNA, DNA)#define _RC_IMPL DEFINST(_RC
DEFINST (ECB, 0xe8,"ecb","(b)", NA, NA, DNA, DNA, DNA, DNA, DNA)#define _RS_IMPL DEFINST(_RS
DEFINST (WH64, 0xf8,"wh64","(b)", NA, NA, DNA, DNA, DNA, DNA, DNA)#define JMP_IMPL DEFINST(JMP
DEFINST (JSR, 0x01,"jsr","a,(b)", IntALU, F_CTRL|F_UNCOND|F_INDIRJMP, DGPR(RA), DNA, DGPR(RB), DNA, DNA)#define RETN_IMPL DEFINST(RETN
DEFINST (JSR_COROUTINE, 0x03,"jsr_coroutine","a,(b)", IntALU, F_CTRL|F_UNCOND|F_INDIRJMP, DGPR(RA), DNA, DGPR(RB), DNA, DNA)#define CTPOP_IMPL DEFINST(CTPOP
DEFINST (PERR, 0x31,"perr","a, b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RA), DGPR(RB), DNA)#define CTLZ_IMPL DEFINST(CTLZ
DEFINST (CTTZ, 0x33,"cttz","b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RB), DNA, DNA)#define UNPKBW_IMPL DEFINST(UNPKBW
DEFINST (UNPKBL, 0x35,"unpkbl","b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RB), DNA, DNA)#define PKWB_IMPL DEFINST(PKWB
DEFINST (PKLB, 0x37,"pklb","b, c", IntALU, F_ICOMP, DGPR(RC), DNA, DGPR(RB), DNA, DNA)#define FTOIT_IMPL DEFINST(FTOIT
DEFINST (FTOIS, 0x78,"ftois","A, c", FloatCVT, F_FCOMP, DGPR(RC), DNA, DFPR(RA), DNA, DNA)#define MINSB8_IMPL DEFINST(MINSB8
DEFINST (MINSB8I, 0x01,"minsb8","a, i, c", IntALU, F_ICOMP|F_IMM, DGPR(RC), DNA, DGPR(RA), DNA, DNA)#define MINSW4_IMPL DEFINST(MINSW4
DEFINST (MINSW4I, 0x01,"minsw4","a, i, c", IntALU, F_ICOMP|F_IMM, DGPR(RC), DNA, DGPR(RA), DNA, DNA)#define MINUB8_IMPL DEFINST(MINUB8
DEFINST (MINUB8I, 0x01,"minub8","a, i, c", IntALU, F_ICOMP|F_IMM, DGPR(RC), DNA, DGPR(RA), DNA, DNA)#define MINUW4_IMPL DEFINST(MINUW4
DEFINST (MINUW4I, 0x01,"minuw4","a, i, c", IntALU, F_ICOMP|F_IMM, DGPR(RC), DNA, DGPR(RA), DNA, DNA)#define MAXUB8_IMPL DEFINST(MAXUB8
DEFINST (MAXUB8I, 0x01,"maxub8","a, i, c", IntALU, F_ICOMP|F_IMM, DGPR(RC), DNA, DGPR(RA), DNA, DNA)#define MAXUW4_IMPL DEFINST(MAXUW4
DEFINST (MAXUW4I, 0x01,"maxuw4","a, i, c", IntALU, F_ICOMP|F_IMM, DGPR(RC), DNA, DGPR(RA), DNA, DNA)#define MAXSB8_IMPL DEFINST(MAXSB8
DEFINST (MAXSB8I, 0x01,"maxsb8","a, i, c", IntALU, F_ICOMP|F_IMM, DGPR(RC), DNA, DGPR(RA), DNA, DNA)#define MAXSW4_IMPL DEFINST(MAXSW4
DEFINST (MAXSW4I, 0x01,"maxsw4","a, i, c", IntALU, F_ICOMP|F_IMM, DGPR(RC), DNA, DGPR(RA), DNA, DNA)#define SEXTB_IMPL DEFINST(SEXTB
DEFINST (SEXTBI, 0x01,"sextb","i, c", IntALU, F_ICOMP|F_IMM, DGPR(RC), DNA, DNA, DNA, DNA)#define SEXTW_IMPL DEFINST(SEXTW

Variables

Define Documentation

#define _RC_IMPL

Value:
{ \ \ }

#define _RS_IMPL

Value:
{ \ \ }

#define ADDL_IMPL

Value:
{ \ SET_GPR(RC, SEXT32((GPR(RA) + GPR(RB)) & ULL(0xffffffff))); \ }

Definition at line 877 of file alpha.def.

#define ADDLI_IMPL

Value:
{ \ SET_GPR(RC, SEXT32((GPR(RA) + IMM) & ULL(0xffffffff))); \ }

#define ADDLV_IMPL

Value:
{ \ \ SET_GPR(RC, SEXT32((GPR(RA) + GPR(RB)) & ULL(0xffffffff))); \ }

Definition at line 1239 of file alpha.def.

#define ADDLVI_IMPL

Value:
{ \ \ SET_GPR(RC, SEXT32((GPR(RA) + IMM) & ULL(0xffffffff))); \ }

#define ADDQ_IMPL

Value:
{ \ SET_GPR(RC, GPR(RA) + GPR(RB)); \ }

Definition at line 1071 of file alpha.def.

#define ADDQI_IMPL

Value:
{ \ SET_GPR(RC, GPR(RA) + IMM); \ }

#define ADDQV_IMPL

Value:
{ \ \ SET_GPR(RC, GPR(RA) + GPR(RB)); \ }

Definition at line 1304 of file alpha.def.

#define ADDQVI_IMPL

Value:
{ \ \ SET_GPR(RC, GPR(RA) + IMM); \ }

#define ADDS_IMPL

Value:
{ \ \ SET_FPR(RC, FPR(RA) + FPR(RB)); \ }

#define ADDT_IMPL

Value:
{ \ SET_FPR(RC, FPR(RA) + FPR(RB)); \ }

#define AMASK_IMPL

Value:
{ \ SET_GPR(RC, GPR(RB) & ULL(0xfffffffffffffef8)); \ }

Definition at line 1691 of file alpha.def.

#define AMASKI_IMPL

Value:
{ \ SET_GPR(RC, IMM & ULL(0xfffffffffffffef8)); \ }

#define AND_IMPL

Value:
{ \ SET_GPR(RC, GPR(RA) & GPR(RB)); \ }

Definition at line 1420 of file alpha.def.

#define ANDI_IMPL

Value:
{ \ SET_GPR(RC, GPR(RA) & IMM); \ }

#define BEQ_IMPL

Value:
{ \ SET_TPC(CPC + (SEXT21(TARG) << 2) + 4); \ if (GPR(RA) == ULL(0)) \ SET_NPC(CPC + (SEXT21(TARG) << 2) + 4); \ }

Definition at line 720 of file alpha.def.

#define BGE_IMPL

Value:
{ \ SET_TPC(CPC + (SEXT21(TARG) << 2) + 4); \ if ((sqword_t)GPR(RA) >= LL(0)) \ SET_NPC(CPC + (SEXT21(TARG) << 2) + 4); \ }

#define BGT_IMPL

Value:
{ \ SET_TPC(CPC + (SEXT21(TARG) << 2) + 4); \ if ((sqword_t)GPR(RA) > LL(0)) \ SET_NPC(CPC + (SEXT21(TARG) << 2) + 4); \ }

Definition at line 786 of file alpha.def.

#define BIC_IMPL

Value:
{ \ SET_GPR(RC, GPR(RA) & ~GPR(RB)); \ }

Definition at line 1441 of file alpha.def.

#define BICI_IMPL

Value:
{ \ SET_GPR(RC, GPR(RA) & ~IMM); \ }

#define BIS_IMPL

Value:
{ \ SET_GPR(RC, GPR(RA) | GPR(RB)); \ }

Definition at line 1508 of file alpha.def.

#define BISI_IMPL

Value:
{ \ SET_GPR(RC, GPR(RA) | IMM); \ }

#define BLBC_IMPL

Value:
{ \ SET_TPC(CPC + (SEXT21(TARG) << 2) + 4); \ if (!(GPR(RA) & 1)) \ SET_NPC(CPC + (SEXT21(TARG) << 2) + 4); \ }

#define BLBS_IMPL

Value:
{ \ SET_TPC(CPC + (SEXT21(TARG) << 2) + 4); \ if (GPR(RA) & 1) \ SET_NPC(CPC + (SEXT21(TARG) << 2) + 4); \ }

#define BLE_IMPL

Value:
{ \ SET_TPC(CPC + (SEXT21(TARG) << 2) + 4); \ if ((sqword_t)GPR(RA) <= LL(0)) \ SET_NPC(CPC + (SEXT21(TARG) << 2) + 4); \ }

Definition at line 742 of file alpha.def.

#define BLT_IMPL

Value:
{ \ SET_TPC(CPC + (SEXT21(TARG) << 2) + 4); \ if ((sqword_t)GPR(RA) < LL(0)) \ SET_NPC(CPC + (SEXT21(TARG) << 2) + 4); \ }

#define BNE_IMPL

Value:
{ \ SET_TPC(CPC + (SEXT21(TARG) << 2) + 4); \ if (GPR(RA) != ULL(0)) \ SET_NPC(CPC + (SEXT21(TARG) << 2) + 4); \ }

Definition at line 764 of file alpha.def.

#define BR_IMPL

Value:
{ \ SET_TPC(CPC + (SEXT21(TARG) << 2) + 4); \ SET_NPC(CPC + (SEXT21(TARG) << 2) + 4); \ SET_GPR(RA, CPC + 4); \ }

#define BSR_IMPL

Value:
{ \ SET_TPC(CPC + (SEXT21(TARG) << 2) + 4); \ SET_NPC(CPC + (SEXT21(TARG) << 2) + 4); \ SET_GPR(RA, CPC + 4); \ }

#define CMOVEQ_IMPL

Value:
{ \ if (GPR(RA) == 0) \ SET_GPR(RC, GPR(RB)); \ }

Definition at line 1529 of file alpha.def.

#define CMOVEQI_IMPL

Value:
{ \ if (GPR(RA) == 0) \ SET_GPR(RC, IMM); \ }

#define CMOVGE_IMPL

Value:
{ \ if ((sqword_t)GPR(RA) >= LL(0)) \ SET_GPR(RC, GPR(RB)); \ }

Definition at line 1640 of file alpha.def.

#define CMOVGEI_IMPL

Value:
{ \ if ((sqword_t)GPR(RA) >= LL(0)) \ SET_GPR(RC, IMM); \ }

#define CMOVGT_IMPL

Value:
{ \ if ((sqword_t)GPR(RA) > LL(0)) \ SET_GPR(RC, GPR(RB)); \ }

Definition at line 1735 of file alpha.def.

#define CMOVGTI_IMPL

Value:
{ \ if ((sqword_t)GPR(RA) > LL(0)) \ SET_GPR(RC, IMM); \ }

#define CMOVLBC_IMPL

Value:
{ \ if ((GPR(RA) & 1) == 0) \ SET_GPR(RC, GPR(RB)); \ }

Definition at line 1485 of file alpha.def.

#define CMOVLBCI_IMPL

Value:
{ \ if ((GPR(RA) & 1) == 0) \ SET_GPR(RC, IMM); \ }

#define CMOVLBS_IMPL

Value:
{ \ if (GPR(RA) & 1) \ SET_GPR(RC, GPR(RB)); \ }

Definition at line 1462 of file alpha.def.

#define CMOVLBSI_IMPL

Value:
{ \ if (GPR(RA) & 1) \ SET_GPR(RC, IMM); \ }

#define CMOVLE_IMPL

Value:
{ \ if ((sqword_t)GPR(RA) <= LL(0)) \ SET_GPR(RC, GPR(RB)); \ }

Definition at line 1712 of file alpha.def.

#define CMOVLEI_IMPL

Value:
{ \ if ((sqword_t)GPR(RA) <= LL(0)) \ SET_GPR(RC, IMM); \ }

#define CMOVLT_IMPL

Value:
{ \ if ((sqword_t)GPR(RA) < LL(0)) \ SET_GPR(RC, GPR(RB)); \ }

Definition at line 1617 of file alpha.def.

#define CMOVLTI_IMPL

Value:
{ \ if ((sqword_t)GPR(RA) < LL(0)) \ SET_GPR(RC, IMM); \ }

#define CMOVNE_IMPL

Value:
{ \ if (GPR(RA) != 0) \ SET_GPR(RC, GPR(RB)); \ }

Definition at line 1552 of file alpha.def.

#define CMOVNEI_IMPL

Value:
{ \ if (GPR(RA) != 0) \ SET_GPR(RC, IMM); \ }

#define CMPBGE_IMPL

Value:
{ \ int _i; \ qword_t _rav, _rbv; \ \ _rav = GPR(RA); \ _rbv = GPR(RB); \ SET_GPR(RC, 0); \ \ for (_i = 56; _i >= 0; _i -= 8) \ { \ SET_GPR(RC, GPR(RC) << 1); \ SET_GPR(RC, (GPR(RC) \ | ((_rav >> _i & (sqword_t)0xff) >= \ (_rbv >> _i & (sqword_t)0xff)))); \ } \ }

Definition at line 961 of file alpha.def.

#define CMPBGEI_IMPL

Value:
{ \ int _i; \ qword_t _rav, _rbv; \ \ _rav = GPR(RA); \ _rbv = IMM; \ SET_GPR(RC, 0); \ \ for (_i = 56; _i >= 0; _i -= 8) \ { \ SET_GPR(RC, GPR(RC) << 1); \ SET_GPR(RC, (GPR(RC) \ | ((_rav >> _i & (sqword_t)0xff) >= \ (_rbv >> _i & (sqword_t)0xff)))); \ } \ }

#define CMPEQ_IMPL

Value:
{ \ SET_GPR(RC, GPR(RA) == GPR(RB)); \ }

Definition at line 1155 of file alpha.def.

#define CMPEQI_IMPL

Value:
{ \ SET_GPR(RC, GPR(RA) == (qword_t)IMM); \ }

#define CMPLE_IMPL

Value:
{ \ SET_GPR(RC, (sqword_t)GPR(RA) <= (sqword_t)GPR(RB)); \ }

Definition at line 1350 of file alpha.def.

#define CMPLEI_IMPL

Value:
{ \ SET_GPR(RC, (sqword_t)GPR(RA) <= (sqword_t)IMM); \ }

#define CMPLT_IMPL

Value:
{ \ SET_GPR(RC, (sqword_t)GPR(RA) < (sqword_t)GPR(RB)); \ }

Definition at line 1283 of file alpha.def.

#define CMPLTI_IMPL

Value:
{ \ SET_GPR(RC, (sqword_t)GPR(RA) < (sqword_t)IMM); \ }

#define CMPTEQ_IMPL

Value:
{ \ SET_FPR(RC, (((FPR_Q(RA) == FPR_Q(RB)) \ || (FPR_Q(RA) << 1 == ULL(0) \ && FPR_Q(RB) << 1 == ULL(0))) \ ? 2.0 \ : 0.0)); \ }

Definition at line 2782 of file alpha.def.

#define CMPTLE_IMPL

Value:
{ \ SET_FPR(RC, (FPR(RA) <= FPR(RB)) ? 2.0 : 0.0); \ }

Definition at line 2804 of file alpha.def.

#define CMPTLT_IMPL

Value:
{ \ SET_FPR(RC, (FPR(RA) < FPR(RB)) ? 2.0 : 0.0); \ }

#define CMPTUN_IMPL

Value:
{ \ SET_FPR(RC, (IS_IEEEFP_DBL_NAN(FPR_Q(RA)) || IS_IEEEFP_DBL_NAN(FPR_Q(RB)))\ ? 2.0 \ : 0.0); \ }

#define CMPULE_IMPL

Value:
{ \ SET_GPR(RC, (qword_t)GPR(RA) <= (qword_t)GPR(RB)); \ }

Definition at line 1218 of file alpha.def.

#define CMPULEI_IMPL

Value:
{ \ SET_GPR(RC, (qword_t)GPR(RA) <= (qword_t)IMM); \ }

#define CMPULT_IMPL

Value:
{ \ SET_GPR(RC, (qword_t)GPR(RA) < (qword_t)GPR(RB)); \ }

Definition at line 1050 of file alpha.def.

#define CMPULTI_IMPL

Value:
{ \ SET_GPR(RC, (qword_t)GPR(RA) < (qword_t)IMM); \ }

#define CPYS_IMPL

Value:
{ \ SET_FPR_Q(RC, ((FPR_Q(RA) & ULL(1) << 63) \ | (FPR_Q(RB) & LL(0x7fffffffffffffff)))); \ }

Definition at line 2869 of file alpha.def.

#define CPYSE_IMPL

Value:
{ \ SET_FPR_Q(RC, ((FPR_Q(RA) & ULL(0xfff) << 52) \ | (FPR_Q(RB) & ULL(0xfffffffffffff)))); \ }

Definition at line 2889 of file alpha.def.

#define CPYSN_IMPL

Value:
{ \ SET_FPR_Q(RC, ((FPR_Q(RA) >> 63 ^ 1) << 63 \ | (FPR_Q(RB) & LL(0x7fffffffffffffff)))); \ }

#define CTLZ_IMPL

Value:
{ \ int _temp, _i; \ qword_t _qwordhold = GPR(RB); \ \ _temp = 0; \ for (_i = 63; _i >= 0; _i--) \ { \ if (_qwordhold & (ULL(1) << _i)) \ break; \ \ _temp++; \ } \ \ SET_GPR(RC, (qword_t)_temp); \ }

#define CTPOP_IMPL

Value:
{ \ int _temp, _i; \ qword_t _qwordhold = GPR(RB); \ \ _temp = 0; \ for (_i = 0; _i <= 63; _i++) \ if (_qwordhold & (ULL(1) << _i)) \ _temp++; \ \ SET_GPR(RC, (qword_t)_temp); \ }

#define CTTZ_IMPL

Value:
{ \ int _temp, _i; \ qword_t _qwordhold = GPR(RB); \ \ _temp = 0; \ for (_i = 0; _i <= 63; _i++) \ { \ if (_qwordhold & (ULL(1) << _i)) \ break; \ \ _temp++; \ } \ \ SET_GPR(RC, (qword_t)_temp); \ }

Definition at line 3249 of file alpha.def.

#define CVTLQ_IMPL

Value:
{ \ sqword_t _longhold; \ sword_t _inthold; \ \ _longhold = FPR_Q(RB); \ _inthold = (((_longhold >> 32) & 0xc0000000) \ | ((_longhold >> 29) & 0x3fffffff)); \ SET_FPR_Q(RC, (sqword_t)_inthold); \ }

#define CVTQL_IMPL

Value:
{ \ sqword_t longhold = FPR_Q(RB); \ \ SET_FPR_Q(RC, (((longhold >> 32) & LL(0xc000000000000000)) \ | (longhold & LL(0x3fffffff)) << 29)); \ }

#define CVTQS_IMPL

Value:
{ \ \ SET_FPR(RC, (sqword_t)FPR_Q(RB)); \ }

#define CVTQT_IMPL

Value:
{ \ SET_FPR(RC, (sqword_t)FPR_Q(RB)); \ }

Definition at line 2841 of file alpha.def.

#define CVTTQ_IMPL

Value:
{ \ SET_FPR_Q(RC, (sqword_t)FPR(RB)); \ }

Definition at line 2822 of file alpha.def.

#define CVTTS_IMPL

Value:
{ \ SET_FPR(RC, (float)FPR(RB)); \ }

#define DIVS_IMPL

Value:
{ \ \ SET_FPR(RC, FPR(RA) / FPR(RB)); \ }

Definition at line 2725 of file alpha.def.

#define DIVT_IMPL

Value:
{ \ SET_FPR(RC, FPR(RA) / FPR(RB)); \ }

Definition at line 2762 of file alpha.def.

#define ECB_IMPL

Value:
{ \ \ }

Definition at line 3088 of file alpha.def.

#define EQV_IMPL

Value:
{ \ SET_GPR(RC, GPR(RA) ^ ~GPR(RB)); \ }

Definition at line 1663 of file alpha.def.

#define EQVI_IMPL

Value:
{ \ SET_GPR(RC, GPR(RA) ^ ~IMM); \ }

#define EXCB_IMPL

Value:
{ \ \ }

#define EXTBL_IMPL

Value:
{ \ SET_GPR(RC, (GPR(RA) >> ((GPR(RB) & 0x7) * 8)) & LL(0xff)); \ }

Definition at line 1834 of file alpha.def.

#define EXTBLI_IMPL

Value:
{ \ SET_GPR(RC, (GPR(RA) >> ((IMM & 0x7) * 8)) & LL(0xff)); \ }

#define EXTLH_IMPL

Value:
{ \ SET_GPR(RC, (GPR(RA) << \ ((64 - (GPR(RB) & 0x7) * 8) & 0x3f)) & LL(0xffffffff));\ }

Definition at line 2358 of file alpha.def.

#define EXTLHI_IMPL

Value:
{ \ SET_GPR(RC, (GPR(RA) << ((64 - (IMM&0x7) * 8) & 0x3f)) & LL(0xffffffff));\ }

#define EXTLL_IMPL

Value:
{ \ SET_GPR(RC, (GPR(RA) >> ((GPR(RB) & 0x7) * 8)) & LL(0xffffffff)); \ }

Definition at line 1964 of file alpha.def.

#define EXTLLI_IMPL

Value:
{ \ SET_GPR(RC, (GPR(RA) >> ((IMM & 0x7) * 8)) & LL(0xffffffff)); \ }

#define EXTQH_IMPL

Value:
{ \ SET_GPR(RC, (GPR(RA) << ((64 - (GPR(RB) & 0x7) * 8) & 0x3f))); \ }

Definition at line 2440 of file alpha.def.

#define EXTQHI_IMPL

Value:
{ \ SET_GPR(RC, (GPR(RA) << ((64 - (IMM & 0x7) * 8) & 0x3f))); \ }

#define EXTQL_IMPL

Value:
{ \ SET_GPR(RC, GPR(RA) >> ((GPR(RB) & 0x7) * 8)); \ }

Definition at line 2139 of file alpha.def.

#define EXTQLI_IMPL

Value:
{ \ SET_GPR(RC, GPR(RA) >> ((IMM & 0x7) * 8)); \ }

#define EXTWH_IMPL

Value:
{ \ SET_GPR(RC, (GPR(RA) << ((64 - (GPR(RB)&0x7) * 8) & 0x3f)) & LL(0xffff));\ }

Definition at line 2280 of file alpha.def.

#define EXTWHI_IMPL

Value:
{ \ SET_GPR(RC, (GPR(RA) << ((64 - (IMM & 0x7) * 8) & 0x3f)) & LL(0xffff));\ }

#define EXTWL_IMPL

Value:
{ \ SET_GPR(RC, (GPR(RA) >> ((GPR(RB) & 0x7) * 8)) & LL(0xffff)); \ }

Definition at line 1899 of file alpha.def.

#define EXTWLI_IMPL

Value:
{ \ SET_GPR(RC, (GPR(RA) >> ((IMM & 0x7) * 8)) & LL(0xffff)); \ }

#define FBEQ_IMPL

Value:
{ \ SET_TPC(CPC + (SEXT21(TARG) << 2) + 4); \ if (FPR(RA) == 0.0) \ SET_NPC(CPC + (SEXT21(TARG) << 2) + 4); \ }

Definition at line 630 of file alpha.def.

#define FBGE_IMPL

Value:
{ \ SET_TPC(CPC + (SEXT21(TARG) << 2) + 4); \ if (FPR(RA) >= 0.0) \ SET_NPC(CPC + (SEXT21(TARG) << 2) + 4); \ }

#define FBGT_IMPL

Value:
{ \ SET_TPC(CPC + (SEXT21(TARG) << 2) + 4); \ if (FPR(RA) > 0.0) \ SET_NPC(CPC + (SEXT21(TARG) << 2) + 4); \ }

Definition at line 698 of file alpha.def.

#define FBLE_IMPL

Value:
{ \ SET_TPC(CPC + (SEXT21(TARG) << 2) + 4); \ if (FPR(RA) <= 0.0) \ SET_NPC(CPC + (SEXT21(TARG) << 2) + 4); \ }

Definition at line 652 of file alpha.def.

#define FBLT_IMPL

Value:
{ \ SET_TPC(CPC + (SEXT21(TARG) << 2) + 4); \ if (FPR(RA) < 0.0) \ SET_NPC(CPC + (SEXT21(TARG) << 2) + 4); \ }

#define FBNE_IMPL

Value:
{ \ SET_TPC(CPC + (SEXT21(TARG) << 2) + 4); \ if (FPR(RA) != 0.0) \ SET_NPC(CPC + (SEXT21(TARG) << 2) + 4); \ }

Definition at line 676 of file alpha.def.

#define FCMOVEQ_IMPL

Value:
{ \ if ((FPR_Q(RA) << 1) == ULL(0)) \ SET_FPR(RC, FPR(RB)); \ }

#define FCMOVGE_IMPL

Value:
{ \ if (((FPR_Q(RA) << 1) == ULL(0)) || (FPR_Q(RA) >> 63 == ULL(0))) \ SET_FPR(RC, FPR(RB)); \ }

Definition at line 2958 of file alpha.def.

#define FCMOVGT_IMPL

Value:
{ \ if (((FPR_Q(RA) << 1) != ULL(0)) && (FPR_Q(RA) >> 63 == ULL(0))) \ SET_FPR(RC, FPR(RB)); \ }

Definition at line 2978 of file alpha.def.

#define FCMOVLE_IMPL

Value:
{ \ if (((FPR_Q(RA) << 1) == ULL(0)) || (FPR_Q(RA) >> 63)) \ SET_FPR(RC, FPR(RB)); \ }

#define FCMOVLT_IMPL

Value:
{ \ if (((FPR_Q(RA) << 1) != ULL(0)) && (FPR_Q(RA) >> 63)) \ SET_FPR(RC, FPR(RB)); \ }

#define FCMOVNE_IMPL

Value:
{ \ if ((FPR_Q(RA) << 1) != ULL(0)) \ SET_FPR(RC, FPR(RB)); \ }

Definition at line 2938 of file alpha.def.

#define FETCH_IMPL

Value:
{ \ \ }

Definition at line 3047 of file alpha.def.

#define FETCH_M_IMPL

Value:
{ \ \ }

#define FLTV_IMPL

Value:
{ \ \ DECLARE_FAULT(md_fault_unimpl); \ }

Definition at line 353 of file alpha.def.

#define FTOIS_IMPL

Value:
{ \ sqword_t _longhold; \ sword_t _inthold; \ \ _longhold = FPR_Q(RA); \ _inthold = (((_longhold >> 32) & ULL(0xc0000000)) \ | ((_longhold >> 29) & ULL(0x3fffffff))); \ \ SET_GPR(RC, (SEXT32(_longhold >> 63) << 32) | _inthold); \ }

Definition at line 3372 of file alpha.def.

#define FTOIT_IMPL

Value:
{ \ SET_GPR(RC, FPR_Q(RA)); \ }

#define IMPLVER_IMPL

Value:
{ \ SET_GPR(RC, ULL(2)); \ }

#define INSBL_IMPL

Value:
{ \ SET_GPR(RC, ((GPR(RA) << ((GPR(RB) & 0x7) * 8)) \ & (ULL(0xff) << ((GPR(RB) & 0x7) * 8)))); \ }

Definition at line 1855 of file alpha.def.

#define INSBLI_IMPL

Value:
{ \ SET_GPR(RC, ((GPR(RA) << ((IMM & 0x7) * 8)) \ & (ULL(0xff) << ((IMM & 0x7) * 8)))); \ }

#define INSLH_IMPL

Value:
{ \ if ((GPR(RB) & 0x7) != 0) \ SET_GPR(RC, ((GPR(RA) >> (63 - (GPR(RB) & 0x7) * 8)) >> 1 \ & (ULL(0xffffffff) >> ((8 - (GPR(RB) & 0x7)) * 8))));\ else \ SET_GPR(RC, 0); \ }

Definition at line 2330 of file alpha.def.

#define INSLHI_IMPL

Value:
{ \ if ((IMM & 0x7) != 0) \ SET_GPR(RC, ((GPR(RA) >> (63 - (IMM & 0x7) * 8)) >> 1 \ & (ULL(0xffffffff) >> ((8 - (IMM & 0x7)) * 8)))); \ SET_GPR(RC, 0); \ }

#define INSLL_IMPL

Value:
{ \ SET_GPR(RC, ((GPR(RA) << ((GPR(RB) & 0x7) * 8)) \ & (ULL(0xffffffff) << ((GPR(RB) & 0x7) * 8)))); \ }

Definition at line 1985 of file alpha.def.

#define INSLLI_IMPL

Value:
{ \ SET_GPR(RC, ((GPR(RA) << ((IMM & 0x7) * 8)) \ & (ULL(0xffffffff) << ((IMM & 0x7) * 8)))); \ }

#define INSQH_IMPL

Value:
{ \ if ((GPR(RB) & 0x7) != 0) \ SET_GPR(RC, ((GPR(RA) >> (63 - (GPR(RB) & 0x7) * 8)) >> 1 \ & (ULL(0xffffffffffffffff) \ >> ((8 - (GPR(RB) & 0x7)) * 8)))); \ else \ SET_GPR(RC, 0); \ }

Definition at line 2409 of file alpha.def.

#define INSQHI_IMPL

Value:
{ \ if ((IMM & 0x7) != 0) \ SET_GPR(RC, ((GPR(RA) >> (63 - (IMM & 0x7) * 8)) >> 1 \ & (ULL(0xffffffffffffffff) \ >> ((8 - (IMM & 0x7)) * 8)))); \ else \ SET_GPR(RC, 0); \ }

#define INSQL_IMPL

Value:
{ \ SET_GPR(RC, ((GPR(RA) << ((GPR(RB) & 0x7) * 8)) \ & (ULL(0xffffffffffffffff) << ((GPR(RB) & 0x7) * 8))));\ }

Definition at line 2181 of file alpha.def.

#define INSQLI_IMPL

Value:
{ \ SET_GPR(RC, ((GPR(RA) << ((IMM & 0x7) * 8)) \ & (ULL(0xffffffffffffffff) << ((IMM & 0x7) * 8)))); \ }

#define INSWH_IMPL

Value:
{ \ if ((GPR(RB) & 0x7) != 0) \ SET_GPR(RC, ((GPR(RA) >> (63 - (GPR(RB) & 0x7) * 8)) >> 1 \ & (ULL(0xffff) >> ((8 - (GPR(RB) & 0x7)) * 8)))); \ else \ SET_GPR(RC, 0); \ }

Definition at line 2251 of file alpha.def.

#define INSWHI_IMPL

Value:
{ \ if ((IMM & 0x7) != 0) \ SET_GPR(RC, ((GPR(RA) >> (63 - (IMM & 0x7) * 8)) >> 1 \ & (ULL(0xffff) >> ((8 - (IMM & 0x7)) * 8)))); \ else \ SET_GPR(RC, 0); \ }

#define INSWL_IMPL

Value:
{ \ SET_GPR(RC, ((GPR(RA) << ((GPR(RB) & 0x7) * 8)) \ & (ULL(0xffff) << ((GPR(RB) & 0x7) * 8)))); \ }

Definition at line 1920 of file alpha.def.

#define INSWLI_IMPL

Value:
{ \ SET_GPR(RC, ((GPR(RA) << ((IMM & 0x7) * 8)) \ & (ULL(0xffff) << ((IMM & 0x7) * 8)))); \ }

#define ITOFF_IMPL

Value:
{ \ \ DECLARE_FAULT(md_fault_unimpl); \ }

#define ITOFS_IMPL

Value:
{ \ sqword_t _longhold, _e1, _e2; \ \ _longhold = GPR(RA) & ULL(0xffffffff); \ \ _e1 = _longhold & 0x40000000; \ _e2 = (_longhold >> 23) & ULL(0x7f); \ if (_e1) \ { \ if (_e2 == ULL(0x3f800000)) \ _e2 = ULL(0x7ff); \ else \ _e2 |= ULL(0x400); \ } \ else \ { \ if (_e2 == 0) \ _e2 = 0; \ else \ _e2 |= ULL(0x380); \ } \ SET_FPR_Q(RC, (((_longhold & ULL(0x80000000)) << 32) \ | (_e2 << 52) | ((_longhold & ULL(0x7fffff)) << 29)));\ }

Definition at line 2597 of file alpha.def.

#define ITOFT_IMPL

Value:
{ \ SET_FPR_Q(RC, GPR(RA)); \ }

Definition at line 2661 of file alpha.def.

#define JMP_IMPL

Value:
{ \ SET_TPC(GPR(RB) & ~3); \ SET_NPC(GPR(RB) & ~3); \ SET_GPR(RA, CPC + 4); \ }

#define JSR_COROUTINE_IMPL

Value:
{ \ SET_TPC(GPR(RB) & ~3); \ SET_NPC(GPR(RB) & ~3); \ SET_GPR(RA, CPC + 4); \ }

Definition at line 3153 of file alpha.def.

#define JSR_IMPL

Value:
{ \ SET_TPC(GPR(RB) & ~3); \ SET_NPC(GPR(RB) & ~3); \ SET_GPR(RA, CPC + 4); \ }

Definition at line 3131 of file alpha.def.

#define LDA_IMPL

Value:
{ \ SET_GPR(RA, GPR(RB) + SEXT(OFS)); \ }

Definition at line 229 of file alpha.def.

#define LDAH_IMPL

Value:
{ \ SET_GPR(RA, GPR(RB) + SEXT32(65536 * OFS)); \ }

#define LDBU_IMPL

Value:
{ \ byte_t _result; \ enum md_fault_type _fault; \ \ _result = READ_BYTE(GPR(RB) + SEXT(OFS), _fault); \ if (_fault != md_fault_none) \ DECLARE_FAULT(_fault); \ \ SET_GPR(RA, (qword_t)_result); \ }

Definition at line 248 of file alpha.def.

#define LDF_IMPL

Value:
{ \ \ DECLARE_FAULT(md_fault_unimpl); \ }

#define LDG_IMPL

Value:
{ \ \ DECLARE_FAULT(md_fault_unimpl); \ }

Definition at line 385 of file alpha.def.

#define LDL_IMPL

Value:
{ \ word_t _result; \ enum md_fault_type _fault; \ \ _result = READ_WORD(GPR(RB) + SEXT(OFS), _fault); \ if (_fault != md_fault_none) \ DECLARE_FAULT(_fault); \ \ SET_GPR(RA, (sqword_t)((sword_t)_result)); \ }

#define LDL_L_IMPL

Value:
{ \ word_t _result; \ enum md_fault_type _fault; \ \ _result = READ_WORD(GPR(RB) + SEXT(OFS), _fault); \ if (_fault != md_fault_none) \ DECLARE_FAULT(_fault); \ \ SET_GPR(RA, (sqword_t)((sword_t)_result)); \ }

#define LDQ_IMPL

Value:
{ \ qword_t _result; \ enum md_fault_type _fault; \ \ _result = READ_QWORD(GPR(RB) + SEXT(OFS), _fault); \ if (_fault != md_fault_none) \ DECLARE_FAULT(_fault); \ \ SET_GPR(RA, _result); \ }

Definition at line 511 of file alpha.def.

#define LDQ_L_IMPL

Value:
{ \ qword_t _result; \ enum md_fault_type _fault; \ \ _result = READ_QWORD(GPR(RB) + SEXT(OFS), _fault); \ if (_fault != md_fault_none) \ DECLARE_FAULT(_fault); \ \ SET_GPR(RA, _result); \ }

Definition at line 545 of file alpha.def.

#define LDQ_U_IMPL

Value:
{ \ qword_t _result; \ enum md_fault_type _fault; \ \ _result = READ_QWORD((GPR(RB) + SEXT(OFS)) & ~7, _fault); \ if (_fault != md_fault_none) \ DECLARE_FAULT(_fault); \ \ SET_GPR(RA, _result); \ }

#define LDS_IMPL

Value:
{ \ sqword_t _longhold, _e1, _e2; \ enum md_fault_type _fault; \ \ _longhold = READ_WORD(GPR(RB) + SEXT(OFS), _fault); \ if (_fault != md_fault_none) \ DECLARE_FAULT(_fault); \ \ _e1 = _longhold & 0x40000000; \ _e2 = (_longhold >> 23) & ULL(0x7f); \ if (_e1) \ { \ if (_e2 == ULL(0x3f800000)) \ _e2 = ULL(0x7ff); \ else \ _e2 |= ULL(0x400); \ } \ else \ { \ if (_e2 == 0) \ _e2 = 0; \ else \ _e2 |= ULL(0x380); \ } \ SET_FPR_Q(RA, ((_longhold & ULL(0x80000000)) << 32 \ | _e2 << 52 | (_longhold & ULL(0x7fffff)) << 29)); \ }

#define LDT_IMPL

Value:
{ \ qword_t _result; \ enum md_fault_type _fault; \ \ _result = READ_QWORD(GPR(RB) + SEXT(OFS), _fault); \ if (_fault != md_fault_none) \ DECLARE_FAULT(_fault); \ \ SET_FPR_Q(RA, _result); \ }

Definition at line 428 of file alpha.def.

#define LDWU_IMPL

Value:
{ \ half_t _result; \ enum md_fault_type _fault; \ \ _result = READ_HALF(GPR(RB) + SEXT(OFS), _fault); \ if (_fault != md_fault_none) \ DECLARE_FAULT(_fault); \ \ SET_GPR(RA, (qword_t)_result); \ }

Definition at line 281 of file alpha.def.

#define MAXSB8_IMPL

Value:
{ \ int _i; \ qword_t _qwordhold_a, _qwordhold_b, _qwordhold_c; \ \ _qwordhold_a = GPR(RA); \ _qwordhold_b = GPR(RB); \ _qwordhold_c = 0; \ \ for (_i = 0; _i <= 7; _i++) \ { \ sbyte_t _bytehold_a, _bytehold_b, _bytehold_c; \ \ _bytehold_a = (_qwordhold_a >> (_i * 8)) & 0xff; \ _bytehold_b = (_qwordhold_b >> (_i * 8)) & 0xff; \ _bytehold_c = MAX(_bytehold_a, _bytehold_b); \ \ _qwordhold_c |= (((qword_t)(byte_t)_bytehold_c & 0xff) << (_i*8)); \ } \ \ SET_GPR(RC, _qwordhold_c); \ }

#define MAXSB8I_IMPL

Value:
{ \ int _i; \ qword_t _qwordhold_a, _qwordhold_b, _qwordhold_c; \ \ _qwordhold_a = GPR(RA); \ _qwordhold_b = IMM; \ _qwordhold_c = 0; \ \ for (_i = 0; _i <= 7; _i++) \ { \ sbyte_t _bytehold_a, _bytehold_b, _bytehold_c; \ \ _bytehold_a = (_qwordhold_a >> (_i * 8)) & 0xff; \ _bytehold_b = (_qwordhold_b >> (_i * 8)) & 0xff; \ _bytehold_c = MAX(_bytehold_a, _bytehold_b); \ \ _qwordhold_c |= (((qword_t)(byte_t)_bytehold_c & 0xff) << (_i*8)); \ } \ \ SET_GPR(RC, _qwordhold_c); \ }

Definition at line 3761 of file alpha.def.

#define MAXSW4_IMPL

Value:
{ \ int _i; \ qword_t _qwordhold_a, _qwordhold_b, _qwordhold_c; \ \ _qwordhold_a = GPR(RA); \ _qwordhold_b = GPR(RB); \ _qwordhold_c = 0; \ \ for (_i = 0; _i <= 3; _i++) \ { \ shalf_t _halfhold_a, _halfhold_b, _halfhold_c; \ \ _halfhold_a = (_qwordhold_a >> (_i * 16)) & 0xffff; \ _halfhold_b = (_qwordhold_b >> (_i * 16)) & 0xffff; \ _halfhold_c = MAX(_halfhold_a, _halfhold_b); \ \ _qwordhold_c |= (((qword_t)(half_t)_halfhold_c & 0xffff) << (_i*16));\ } \ \ SET_GPR(RC, _qwordhold_c); \ }

#define MAXSW4I_IMPL

Value:
{ \ int _i; \ qword_t _qwordhold_a, _qwordhold_b, _qwordhold_c; \ \ _qwordhold_a = GPR(RA); \ _qwordhold_b = IMM; \ _qwordhold_c = 0; \ \ for (_i = 0; _i <= 3; _i++) \ { \ shalf_t _halfhold_a, _halfhold_b, _halfhold_c; \ \ _halfhold_a = (_qwordhold_a >> (_i * 16)) & 0xffff; \ _halfhold_b = (_qwordhold_b >> (_i * 16)) & 0xffff; \ _halfhold_c = MAX(_halfhold_a, _halfhold_b); \ \ _qwordhold_c |= (((qword_t)(half_t)_halfhold_c & 0xffff) << (_i*16));\ } \ \ SET_GPR(RC, _qwordhold_c); \ }

Definition at line 3818 of file alpha.def.

#define MAXUB8_IMPL

Value:
{ \ int _i; \ qword_t _qwordhold_a, _qwordhold_b, _qwordhold_c; \ \ _qwordhold_a = GPR(RA); \ _qwordhold_b = GPR(RB); \ _qwordhold_c = 0; \ \ for (_i = 0; _i <= 7; _i++) \ { \ byte_t _bytehold_a, _bytehold_b, _bytehold_c; \ \ _bytehold_a = (_qwordhold_a >> (_i * 8)) & 0xff; \ _bytehold_b = (_qwordhold_b >> (_i * 8)) & 0xff; \ _bytehold_c = MAX(_bytehold_a, _bytehold_b); \ \ _qwordhold_c |= (((qword_t)(byte_t)_bytehold_c & 0xff) << (_i*8)); \ } \ \ SET_GPR(RC, _qwordhold_c); \ }

#define MAXUB8I_IMPL

Value:
{ \ int _i; \ qword_t _qwordhold_a, _qwordhold_b, _qwordhold_c; \ \ _qwordhold_a = GPR(RA); \ _qwordhold_b = IMM; \ _qwordhold_c = 0; \ \ for (_i = 0; _i <= 7; _i++) \ { \ byte_t _bytehold_a, _bytehold_b, _bytehold_c; \ \ _bytehold_a = (_qwordhold_a >> (_i * 8)) & 0xff; \ _bytehold_b = (_qwordhold_b >> (_i * 8)) & 0xff; \ _bytehold_c = MAX(_bytehold_a, _bytehold_b); \ \ _qwordhold_c |= (((qword_t)(byte_t)_bytehold_c & 0xff) << (_i*8)); \ } \ \ SET_GPR(RC, _qwordhold_c); \ }

Definition at line 3647 of file alpha.def.

#define MAXUW4_IMPL

Value:
{ \ int _i; \ qword_t _qwordhold_a, _qwordhold_b, _qwordhold_c; \ \ _qwordhold_a = GPR(RA); \ _qwordhold_b = GPR(RB); \ _qwordhold_c = 0; \ \ for (_i = 0; _i <= 3; _i++) \ { \ half_t _halfhold_a, _halfhold_b, _halfhold_c; \ \ _halfhold_a = (_qwordhold_a >> (_i * 16)) & 0xffff; \ _halfhold_b = (_qwordhold_b >> (_i * 16)) & 0xffff; \ _halfhold_c = MAX(_halfhold_a, _halfhold_b); \ \ _qwordhold_c |= (((qword_t)(half_t)_halfhold_c & 0xffff) << (_i*16));\ } \ \ SET_GPR(RC, _qwordhold_c); \ }

#define MAXUW4I_IMPL

Value:
{ \ int _i; \ qword_t _qwordhold_a, _qwordhold_b, _qwordhold_c; \ \ _qwordhold_a = GPR(RA); \ _qwordhold_b = IMM; \ _qwordhold_c = 0; \ \ for (_i = 0; _i <= 3; _i++) \ { \ half_t _halfhold_a, _halfhold_b, _halfhold_c; \ \ _halfhold_a = (_qwordhold_a >> (_i * 16)) & 0xffff; \ _halfhold_b = (_qwordhold_b >> (_i * 16)) & 0xffff; \ _halfhold_c = MAX(_halfhold_a, _halfhold_b); \ \ _qwordhold_c |= (((qword_t)(half_t)_halfhold_c & 0xffff) << (_i*16));\ } \ \ SET_GPR(RC, _qwordhold_c); \ }

Definition at line 3704 of file alpha.def.

#define MB_IMPL

Value:
{ \ \ }

Definition at line 3026 of file alpha.def.

#define MF_FPCR_IMPL

Value:
{ \ \ SET_FPR_Q(RA, FPCR); \ }

Definition at line 2917 of file alpha.def.

#define MINSB8_IMPL

Value:
{ \ int _i; \ qword_t _qwordhold_a, _qwordhold_b, _qwordhold_c; \ \ _qwordhold_a = GPR(RA); \ _qwordhold_b = GPR(RB); \ _qwordhold_c = 0; \ \ for (_i = 0; _i <= 7; _i++) \ { \ sbyte_t _bytehold_a, _bytehold_b, _bytehold_c; \ \ _bytehold_a = (_qwordhold_a >> (_i * 8)) & 0xff; \ _bytehold_b = (_qwordhold_b >> (_i * 8)) & 0xff; \ _bytehold_c = MIN(_bytehold_a, _bytehold_b); \ \ _qwordhold_c |= (((qword_t)(byte_t)_bytehold_c & 0xff) << (_i*8)); \ } \ \ SET_GPR(RC, _qwordhold_c); \ }

#define MINSB8I_IMPL

Value:
{ \ int _i; \ qword_t _qwordhold_a, _qwordhold_b, _qwordhold_c; \ \ _qwordhold_a = GPR(RA); \ _qwordhold_b = IMM; \ _qwordhold_c = 0; \ \ for (_i = 0; _i <= 7; _i++) \ { \ sbyte_t _bytehold_a, _bytehold_b, _bytehold_c; \ \ _bytehold_a = (_qwordhold_a >> (_i * 8)) & 0xff; \ _bytehold_b = (_qwordhold_b >> (_i * 8)) & 0xff; \ _bytehold_c = MIN(_bytehold_a, _bytehold_b); \ \ _qwordhold_c |= (((qword_t)(byte_t)_bytehold_c & 0xff) << (_i*8)); \ } \ \ SET_GPR(RC, _qwordhold_c); \ }

Definition at line 3419 of file alpha.def.

#define MINSW4_IMPL

Value:
{ \ int _i; \ qword_t _qwordhold_a, _qwordhold_b, _qwordhold_c; \ \ _qwordhold_a = GPR(RA); \ _qwordhold_b = GPR(RB); \ _qwordhold_c = 0; \ \ for (_i = 0; _i <= 3; _i++) \ { \ shalf_t _halfhold_a, _halfhold_b, _halfhold_c; \ \ _halfhold_a = (_qwordhold_a >> (_i * 16)) & 0xffff; \ _halfhold_b = (_qwordhold_b >> (_i * 16)) & 0xffff; \ _halfhold_c = MIN(_halfhold_a, _halfhold_b); \ \ _qwordhold_c |= (((qword_t)(half_t)_halfhold_c & 0xffff) << (_i*16));\ } \ \ SET_GPR(RC, _qwordhold_c); \ }

#define MINSW4I_IMPL

Value:
{ \ int _i; \ qword_t _qwordhold_a, _qwordhold_b, _qwordhold_c; \ \ _qwordhold_a = GPR(RA); \ _qwordhold_b = IMM; \ _qwordhold_c = 0; \ \ for (_i = 0; _i <= 3; _i++) \ { \ shalf_t _halfhold_a, _halfhold_b, _halfhold_c; \ \ _halfhold_a = (_qwordhold_a >> (_i * 16)) & 0xffff; \ _halfhold_b = (_qwordhold_b >> (_i * 16)) & 0xffff; \ _halfhold_c = MIN(_halfhold_a, _halfhold_b); \ \ _qwordhold_c |= (((qword_t)(half_t)_halfhold_c & 0xffff) << (_i*16));\ } \ \ SET_GPR(RC, _qwordhold_c); \ }

Definition at line 3476 of file alpha.def.

#define MINUB8_IMPL

Value:
{ \ int _i; \ qword_t _qwordhold_a, _qwordhold_b, _qwordhold_c; \ \ _qwordhold_a = GPR(RA); \ _qwordhold_b = GPR(RB); \ _qwordhold_c = 0; \ \ for (_i = 0; _i <= 7; _i++) \ { \ byte_t _bytehold_a, _bytehold_b, _bytehold_c; \ \ _bytehold_a = (_qwordhold_a >> (_i * 8)) & 0xff; \ _bytehold_b = (_qwordhold_b >> (_i * 8)) & 0xff; \ _bytehold_c = MIN(_bytehold_a, _bytehold_b); \ \ _qwordhold_c |= (((qword_t)(byte_t)_bytehold_c & 0xff) << (_i*8)); \ } \ \ SET_GPR(RC, _qwordhold_c); \ }

#define MINUB8I_IMPL

Value:
{ \ int _i; \ qword_t _qwordhold_a, _qwordhold_b, _qwordhold_c; \ \ _qwordhold_a = GPR(RA); \ _qwordhold_b = IMM; \ _qwordhold_c = 0; \ \ for (_i = 0; _i <= 7; _i++) \ { \ byte_t _bytehold_a, _bytehold_b, _bytehold_c; \ \ _bytehold_a = (_qwordhold_a >> (_i * 8)) & 0xff; \ _bytehold_b = (_qwordhold_b >> (_i * 8)) & 0xff; \ _bytehold_c = MIN(_bytehold_a, _bytehold_b); \ \ _qwordhold_c |= (((qword_t)(byte_t)_bytehold_c & 0xff) << (_i*8)); \ } \ \ SET_GPR(RC, _qwordhold_c); \ }

Definition at line 3533 of file alpha.def.

#define MINUW4_IMPL

Value:
{ \ int _i; \ qword_t _qwordhold_a, _qwordhold_b, _qwordhold_c; \ \ _qwordhold_a = GPR(RA); \ _qwordhold_b = GPR(RB); \ _qwordhold_c = 0; \ \ for (_i = 0; _i <= 3; _i++) \ { \ half_t _halfhold_a, _halfhold_b, _halfhold_c; \ \ _halfhold_a = (_qwordhold_a >> (_i * 16)) & 0xffff; \ _halfhold_b = (_qwordhold_b >> (_i * 16)) & 0xffff; \ _halfhold_c = MIN(_halfhold_a, _halfhold_b); \ \ _qwordhold_c |= (((qword_t)(half_t)_halfhold_c & 0xffff) << (_i*16));\ } \ \ SET_GPR(RC, _qwordhold_c); \ }

#define MINUW4I_IMPL

Value:
{ \ int _i; \ qword_t _qwordhold_a, _qwordhold_b, _qwordhold_c; \ \ _qwordhold_a = GPR(RA); \ _qwordhold_b = IMM; \ _qwordhold_c = 0; \ \ for (_i = 0; _i <= 3; _i++) \ { \ half_t _halfhold_a, _halfhold_b, _halfhold_c; \ \ _halfhold_a = (_qwordhold_a >> (_i * 16)) & 0xffff; \ _halfhold_b = (_qwordhold_b >> (_i * 16)) & 0xffff; \ _halfhold_c = MIN(_halfhold_a, _halfhold_b); \ \ _qwordhold_c |= (((qword_t)(half_t)_halfhold_c & 0xffff) << (_i*16));\ } \ \ SET_GPR(RC, _qwordhold_c); \ }

Definition at line 3590 of file alpha.def.

#define MSKBL_IMPL

Value:
{ \ SET_GPR(RC, GPR(RA) & ~(ULL(0xff) << ((GPR(RB) & 0x7) * 8))); \ }

Definition at line 1813 of file alpha.def.

#define MSKBLI_IMPL

Value:
{ \ SET_GPR(RC, GPR(RA) & ~(ULL(0xff) << ((IMM & 0x7) * 8))); \ }

#define MSKLH_IMPL

Value:
{ \ if ((GPR(RB) & 0x7) != 0) \ SET_GPR(RC, GPR(RA) & ~(ULL(0xffffffff) >> \ ((8 - (GPR(RB) & 0x7)) * 8))); \ else \ SET_GPR(RC, GPR(RA)); \ }

Definition at line 2301 of file alpha.def.

#define MSKLHI_IMPL

Value:
{ \ if ((IMM & 0x7) != 0) \ SET_GPR(RC, GPR(RA) & ~(ULL(0xffffffff) >> \ ((8 - (IMM & 0x7)) * 8))); \ else \ SET_GPR(RC, GPR(RA)); \ }

#define MSKLL_IMPL

Value:
{ \ SET_GPR(RC, GPR(RA) & ~(ULL(0xffffffff) << ((GPR(RB) & 0x7) * 8))); \ }

Definition at line 1943 of file alpha.def.

#define MSKLLI_IMPL

Value:
{ \ SET_GPR(RC, GPR(RA) & ~(ULL(0xffffffff) << ((IMM & 0x7) * 8))); \ }

#define MSKQH_IMPL

Value:
{ \ if ((GPR(RB) & 0x7) != 0) \ SET_GPR(RC, (GPR(RA) & ~(ULL(0xffffffffffffffff) \ >> ((8 - (GPR(RB) & 0x7)) * 8)))); \ else \ SET_GPR(RC, GPR(RA)); \ }

Definition at line 2380 of file alpha.def.

#define MSKQHI_IMPL

Value:
{ \ if ((IMM & 0x7) != 0) \ SET_GPR(RC, (GPR(RA) & ~(ULL(0xffffffffffffffff) \ >> ((8 - (IMM & 0x7)) * 8)))); \ else \ SET_GPR(RC, GPR(RA)); \ }

#define MSKQL_IMPL

Value:
{ \ SET_GPR(RC, (GPR(RA) \ & ~(ULL(0xffffffffffffffff) \ << ((GPR(RB) & 0x7) * 8)))); \ }

Definition at line 2094 of file alpha.def.

#define MSKQLI_IMPL

Value:
{ \ SET_GPR(RC, (GPR(RA) \ & ~(ULL(0xffffffffffffffff) << ((IMM & 0x7) * 8)))); \ }

#define MSKWH_IMPL

Value:
{ \ if ((GPR(RB) & 0x7) != 0) \ SET_GPR(RC, GPR(RA) & ~(ULL(0xffff) >> ((8 - (GPR(RB) & 0x7)) * 8)));\ else \ SET_GPR(RC, GPR(RA)); \ }

Definition at line 2224 of file alpha.def.

#define MSKWHI_IMPL

Value:
{ \ if ((IMM & 0x7) != 0) \ SET_GPR(RC, GPR(RA) & ~(ULL(0xffff) >> ((8 - (IMM & 0x7)) * 8))); \ else \ SET_GPR(RC, GPR(RA)); \ }

#define MSKWL_IMPL

Value:
{ \ SET_GPR(RC, GPR(RA) & ~(ULL(0xffff) << ((GPR(RB) & 0x7) * 8))); \ }

Definition at line 1878 of file alpha.def.

#define MSKWLI_IMPL

Value:
{ \ SET_GPR(RC, GPR(RA) & ~(ULL(0xffff) << ((IMM & 0x7) * 8))); \ }

#define MT_FPCR_IMPL

Value:
{ \ \ SET_FPCR(FPR_Q(RA)); \ }

#define MULL_IMPL

Value:
{ \ SET_GPR(RC, SEXT32((GPR(RA) * GPR(RB)) & ULL(0xffffffff))); \ }

Definition at line 2475 of file alpha.def.

#define MULLI_IMPL

Value:
{ \ SET_GPR(RC, SEXT32((GPR(RA) * IMM) & ULL(0xffffffff))); \ }

#define MULQ_IMPL

Value:
{ \ SET_GPR(RC, GPR(RA) * GPR(RB)); \ }

Definition at line 2496 of file alpha.def.

#define MULQI_IMPL

Value:
{ \ SET_GPR(RC, GPR(RA) * IMM); \ }

#define MULS_IMPL

Value:
{ \ \ SET_FPR(RC, FPR(RA) * FPR(RB)); \ }

#define MULT_IMPL

Value:
{ \ SET_FPR(RC, FPR(RA) * FPR(RB)); \ }

#define ORNOT_IMPL

Value:
{ \ SET_GPR(RC, GPR(RA) | ~GPR(RB)); \ }

Definition at line 1575 of file alpha.def.

#define ORNOTI_IMPL

Value:
{ \ SET_GPR(RC, GPR(RA) | ~IMM); \ }

#define PAL_CALLSYS_IMPL

Value:
{ \ SYSCALL(inst); \ }

#define PAL_RDUNIQ_IMPL

Value:
{ \ SET_GPR( 0, UNIQ); \ }

Definition at line 809 of file alpha.def.

#define PAL_WRUNIQ_IMPL

Value:
{ \ SET_UNIQ(GPR( 16)); \ }

#define PERR_IMPL

Value:
{ \ int _i; \ qword_t _sum_diffs, _qwordhold_a, _qwordhold_b; \ \ _qwordhold_a = GPR(RA); \ _qwordhold_b = GPR(RB); \ _sum_diffs = 0; \ \ for (_i = 0; _i <= 7; _i++) \ { \ byte_t _bytehold_a, _bytehold_b; \ \ _bytehold_a = (_qwordhold_a >> (_i*8)) & 0xff; \ _bytehold_b = (_qwordhold_b >> (_i*8)) & 0xff; \ if (_bytehold_a >= _bytehold_b) \ _sum_diffs += (_bytehold_a - _bytehold_b); \ else \ _sum_diffs += (_bytehold_b - _bytehold_a); \ } \ \ SET_GPR(RC, _sum_diffs); \ }

Definition at line 3198 of file alpha.def.

#define PKLB_IMPL

Value:
{ \ qword_t _temp, _qwordhold; \ \ _temp = 0; \ _qwordhold = GPR(RB); \ \ _temp |= (_qwordhold & 0xff); \ _temp |= (((_qwordhold >> 32) & 0xff) << 8); \ \ SET_GPR(RC, _temp); \ }

Definition at line 3327 of file alpha.def.

#define PKWB_IMPL

Value:
{ \ qword_t _temp, _qwordhold; \ \ _temp = 0; \ _qwordhold = GPR(RB); \ \ _temp |= (_qwordhold & 0xff); \ _temp |= (((_qwordhold >> 16) & 0xff) << 8); \ _temp |= (((_qwordhold >> 32) & 0xff) << 16); \ _temp |= (((_qwordhold >> 48) & 0xff) << 24); \ \ SET_GPR(RC, _temp); \ }

#define RETN_IMPL

Value:
{ \ SET_TPC(GPR(RB) & ~3); \ SET_NPC(GPR(RB) & ~3); \ SET_GPR(RA, CPC + 4); \ }

#define RPCC_IMPL

Value:
{ \ \ SET_GPR(RA, ULL(0)); \ }

Definition at line 3067 of file alpha.def.

#define S4ADDL_IMPL

Value:
{ \ SET_GPR(RC, SEXT32(((GPR(RA) << 2) + GPR(RB)) & ULL(0xffffffff))); \ }

Definition at line 898 of file alpha.def.

#define S4ADDLI_IMPL

Value:
{ \ SET_GPR(RC, SEXT32(((GPR(RA) << 2) + IMM) & ULL(0xffffffff))); \ }

#define S4ADDQ_IMPL

Value:
{ \ SET_GPR(RC, (GPR(RA) << 2) + GPR(RB)); \ }

Definition at line 1092 of file alpha.def.

#define S4ADDQI_IMPL

Value:
{ \ SET_GPR(RC, (GPR(RA) << 2) + IMM); \ }

#define S4SUBL_IMPL

Value:
{ \ SET_GPR(RC, SEXT32(((GPR(RA) << 2) - GPR(RB)) & ULL(0xffffffff))); \ }

Definition at line 940 of file alpha.def.

#define S4SUBLI_IMPL

Value:
{ \ SET_GPR(RC, SEXT32(((GPR(RA) << 2) - IMM) & ULL(0xffffffff))); \ }

#define S4SUBQ_IMPL

Value:
{ \ SET_GPR(RC, (GPR(RA) << 2) - GPR(RB)); \ }

Definition at line 1134 of file alpha.def.

#define S4SUBQI_IMPL

Value:
{ \ SET_GPR(RC, (GPR(RA) << 2) - IMM); \ }

#define S8ADDL_IMPL

Value:
{ \ SET_GPR(RC, SEXT32(((GPR(RA) << 3) + GPR(RB)) & ULL(0xffffffff))); \ }

Definition at line 1008 of file alpha.def.

#define S8ADDLI_IMPL

Value:
{ \ SET_GPR(RC, SEXT32(((GPR(RA) << 3) + IMM) & ULL(0xffffffff))); \ }

#define S8ADDQ_IMPL

Value:
{ \ SET_GPR(RC, (GPR(RA) << 3) + GPR(RB)); \ }

Definition at line 1176 of file alpha.def.

#define S8ADDQI_IMPL

Value:
{ \ SET_GPR(RC, (GPR(RA) << 3) + IMM); \ }

#define S8SUBL_IMPL

Value:
{ \ SET_GPR(RC, SEXT32(((GPR(RA) << 3) - GPR(RB)) & ULL(0xffffffff))); \ }

Definition at line 1029 of file alpha.def.

#define S8SUBLI_IMPL

Value:
{ \ SET_GPR(RC, SEXT32(((GPR(RA) << 3) - IMM) & ULL(0xffffffff))); \ }

#define S8SUBQ_IMPL

Value:
{ \ SET_GPR(RC, (GPR(RA) << 3) - GPR(RB)); \ }

Definition at line 1197 of file alpha.def.

#define S8SUBQI_IMPL

Value:
{ \ SET_GPR(RC, (GPR(RA) << 3) - IMM); \ }

#define SEXTB_IMPL

Value:
{ \ SET_GPR(RC, (qword_t)(sqword_t)(sbyte_t)(GPR(RB) & 0xff)); \ }

#define SEXTBI_IMPL

Value:
{ \ SET_GPR(RC, (qword_t)(sqword_t)(sbyte_t)(IMM & 0xff)); \ }

Definition at line 3860 of file alpha.def.

#define SEXTW_IMPL

Value:
{ \ SET_GPR(RC, (qword_t)(sqword_t)(shalf_t)(GPR(RB) & 0xffff)); \ }

#define SEXTWI_IMPL

Value:
{ \ SET_GPR(RC, (qword_t)(sqword_t)(shalf_t)(IMM & 0xffff)); \ }

Definition at line 3884 of file alpha.def.

#define SLL_IMPL

Value:
{ \ SET_GPR(RC, GPR(RA) << (GPR(RB) & 0x3f)); \ }

Definition at line 2160 of file alpha.def.

#define SLLI_IMPL

Value:
{ \ SET_GPR(RC, GPR(RA) << (IMM & 0x3f)); \ }

#define SQRTF_IMPL

Value:
{ \ \ DECLARE_FAULT(md_fault_unimpl); \ }

#define SQRTG_IMPL

Value:
{ \ \ DECLARE_FAULT(md_fault_unimpl); \ }

#define SQRTS_IMPL

Value:
{ \ if (FPR(RB) < 0.0) \ DECLARE_FAULT(md_fault_invalid); \ \ \ SET_FPR(RC, (dfloat_t)sqrt((double)FPR(RB))); \ }

Definition at line 2638 of file alpha.def.

#define SQRTT_IMPL

Value:
{ \ if (FPR(RB) < 0.0) \ DECLARE_FAULT(md_fault_invalid); \ \ SET_FPR(RC, (dfloat_t)sqrt((double)FPR(RB))); \ }

Definition at line 2680 of file alpha.def.

#define SRA_IMPL

Value:
{ \ SET_GPR(RC, (sqword_t)GPR(RA) >> (GPR(RB) & 0x3f)); \ }

Definition at line 2203 of file alpha.def.

#define SRAI_IMPL

Value:
{ \ SET_GPR(RC, (sqword_t)GPR(RA) >> (IMM & 0x3f)); \ }

#define SRL_IMPL

Value:
{ \ SET_GPR(RC, GPR(RA) >> (GPR(RB) & 0x3f)); \ }

Definition at line 2118 of file alpha.def.

#define SRLI_IMPL

Value:
{ \ SET_GPR(RC, GPR(RA) >> (IMM & 0x3f)); \ }

#define STB_IMPL

Value:
{ \ enum md_fault_type _fault; \ \ WRITE_BYTE((byte_t)GPR(RA), GPR(RB) + SEXT(OFS), _fault); \ if (_fault != md_fault_none) \ DECLARE_FAULT(_fault); \ }

Definition at line 312 of file alpha.def.

#define STF_IMPL

Value:
{ \ \ DECLARE_FAULT(md_fault_unimpl); \ }

#define STG_IMPL

Value:
{ \ \ DECLARE_FAULT(md_fault_unimpl); \ }

Definition at line 454 of file alpha.def.

#define STL_C_IMPL

Value:
{ \ word_t _src; \ enum md_fault_type _fault; \ \ _src = (word_t)(GPR(RA) & ULL(0xffffffff)); \ WRITE_WORD(_src, GPR(RB) + SEXT(OFS), _fault); \ if (_fault != md_fault_none) \ DECLARE_FAULT(_fault); \ }

#define STL_IMPL

Value:
{ \ word_t _src; \ enum md_fault_type _fault; \ \ _src = (word_t)(GPR(RA) & ULL(0xffffffff)); \ WRITE_WORD(_src, GPR(RB) + SEXT(OFS), _fault); \ if (_fault != md_fault_none) \ DECLARE_FAULT(_fault); \ }

#define STQ_C_IMPL

Value:
{ \ enum md_fault_type _fault; \ \ WRITE_QWORD(GPR(RA), GPR(RB) + SEXT(OFS), _fault); \ if (_fault != md_fault_none) \ DECLARE_FAULT(_fault); \ }

Definition at line 606 of file alpha.def.

#define STQ_IMPL

Value:
{ \ enum md_fault_type _fault; \ \ WRITE_QWORD(GPR(RA), GPR(RB) + SEXT(OFS), _fault); \ if (_fault != md_fault_none) \ DECLARE_FAULT(_fault); \ }

Definition at line 576 of file alpha.def.

#define STQ_U_IMPL

Value:
{ \ enum md_fault_type _fault; \ \ WRITE_QWORD(GPR(RA), (GPR(RB) + SEXT(OFS)) & ~7, _fault); \ if (_fault != md_fault_none) \ DECLARE_FAULT(_fault); \ }

#define STS_IMPL

Value:
{ \ sqword_t _longhold; \ sword_t _inthold; \ enum md_fault_type _fault; \ \ _longhold = FPR_Q(RA); \ _inthold = (((_longhold >> 32) & ULL(0xc0000000)) \ | ((_longhold >> 29) & ULL(0x3fffffff))); \ WRITE_WORD(_inthold, GPR(RB) + SEXT(OFS), _fault); \ if (_fault != md_fault_none) \ DECLARE_FAULT(_fault); \ }

#define STT_IMPL

Value:
{ \ enum md_fault_type _fault; \ \ WRITE_QWORD(FPR_Q(RA), GPR(RB) + SEXT(OFS), _fault); \ if (_fault != md_fault_none) \ DECLARE_FAULT(_fault); \ }

Definition at line 482 of file alpha.def.

#define STW_IMPL

Value:
{ \ enum md_fault_type _fault; \ \ WRITE_HALF((half_t)GPR(RA), GPR(RB) + SEXT(OFS), _fault); \ if (_fault != md_fault_none) \ DECLARE_FAULT(_fault); \ }

#define SUBL_IMPL

Value:
{ \ SET_GPR(RC, SEXT32((GPR(RA) - GPR(RB)) & ULL(0xffffffff))); \ }

Definition at line 919 of file alpha.def.

#define SUBLI_IMPL

Value:
{ \ SET_GPR(RC, SEXT32((GPR(RA) - IMM) & ULL(0xffffffff))); \ }

#define SUBLV_IMPL

Value:
{ \ SET_GPR(RC, SEXT32((GPR(RA) - GPR(RB)) & ULL(0xffffffff))); \ }

Definition at line 1262 of file alpha.def.

#define SUBLVI_IMPL

Value:
{ \ SET_GPR(RC, SEXT32((GPR(RA) - IMM) & ULL(0xffffffff))); \ }

#define SUBQ_IMPL

Value:
{ \ SET_GPR(RC, GPR(RA) - GPR(RB)); \ }

Definition at line 1113 of file alpha.def.

#define SUBQI_IMPL

Value:
{ \ SET_GPR(RC, GPR(RA) - IMM); \ }

#define SUBQV_IMPL

Value:
{ \ \ SET_GPR(RC, GPR(RA) - GPR(RB)); \ }

Definition at line 1327 of file alpha.def.

#define SUBQVI_IMPL

Value:
{ \ \ SET_GPR(RC, GPR(RA) - IMM); \ }

#define SUBS_IMPL

Value:
{ \ \ SET_FPR(RC, FPR(RA) - FPR(RB)); \ }

Definition at line 2705 of file alpha.def.

#define SUBT_IMPL

Value:
{ \ SET_FPR(RC, FPR(RA) - FPR(RB)); \ }

Definition at line 2744 of file alpha.def.

#define TRAPB_IMPL

Value:
{ \ \ }

Definition at line 3007 of file alpha.def.

#define UMULH_IMPL

Definition at line 2517 of file alpha.def.

#define UMULHI_IMPL

Value:
{ \ sqword_t _v1 = GPR(RA); \ sqword_t _v2 = IMM; \ qword_t _result; \ qword_t _a, _b, _c, _d; \ qword_t _bd, _ad, _cb, _ac; \ qword_t _mid, _mid2, _carry_mid = 0; \ \ _a = (_v1 >> 32) & LL(0xffffffff); \ _b = _v1 & LL(0xffffffff); \ _c = (_v2 >> 32) & LL(0xffffffff); \ _d = _v2 & LL(0xffffffff); \ \ _bd = _b * _d; \ _ad = _a * _d; \ _cb = _c * _b; \ _ac = _a * _c; \ \ _mid = _ad + _cb; \ if (ARITH_OVFL(_mid, _ad, _cb)) \ _carry_mid = 1; \ \ _mid2 = _mid + ((_bd >> 32) & LL(0xffffffff)); \ if (ARITH_OVFL(_mid2, _mid, ((_bd >> 32) & LL(0xffffffff)))) \ _carry_mid += 1; \ _result = \ _ac + (_carry_mid << 32) + ((_mid2 >> 32) & LL(0xffffffff)); \ \ SET_GPR(RC, _result); \ }

#define UNPKBL_IMPL

Value:
{ \ qword_t _temp, _qwordhold; \ \ _temp = 0; \ _qwordhold = GPR(RB); \ \ _temp |= (_qwordhold & 0xff); \ _temp |= (((_qwordhold >> 8) & 0xff) << 32); \ \ SET_GPR(RC, _temp); \ }

Definition at line 3291 of file alpha.def.

#define UNPKBW_IMPL

Value:
{ \ qword_t _temp, _qwordhold; \ \ _temp = 0; \ _qwordhold = GPR(RB); \ \ _temp |= (_qwordhold & 0xff); \ _temp |= (((_qwordhold >> 8) & 0xff) << 16); \ _temp |= (((_qwordhold >> 16) & 0xff) << 32); \ _temp |= (((_qwordhold >> 24) & 0xff) << 48); \ \ SET_GPR(RC, _temp); \ }

#define WH64_IMPL

Value:
{ \ \ }

Definition at line 3108 of file alpha.def.

#define WMB_IMPL

Value:
{ \ \ }

#define XOR_IMPL

Value:
{ \ SET_GPR(RC, GPR(RA) ^ GPR(RB)); \ }

Definition at line 1596 of file alpha.def.

#define XORI_IMPL

Value:
{ \ SET_GPR(RC, GPR(RA) ^ IMM); \ }

#define ZAP_IMPL

Value:
{ \ int _i; \ qword_t _temp = LL(0xff); \ qword_t _rav = GPR(RA); \ qword_t _rbv = GPR(RB); \ \ SET_GPR(RC, 0); \ for (_i = 1; _i < 0x100; _i = _i << 1) \ { \ if (_i & ~_rbv) \ SET_GPR(RC, GPR(RC) | (_rav & _temp)); \ _temp = _temp << 8; \ } \ }

Definition at line 2008 of file alpha.def.

#define ZAPI_IMPL

Value:
{ \ int _i; \ qword_t _temp = LL(0xff); \ qword_t _rav = GPR(RA); \ qword_t _rbv = IMM; \ \ SET_GPR(RC, 0); \ for (_i = 1; _i < 0x100; _i = _i << 1) \ { \ if (_i & ~_rbv) \ SET_GPR(RC, GPR(RC) | (_rav & _temp)); \ _temp = _temp << 8; \ } \ }

#define ZAPNOT_IMPL

Value:
{ \ int _i; \ qword_t _temp = LL(0xff); \ qword_t _rav = GPR(RA); \ qword_t _rbv = GPR(RB); \ \ SET_GPR(RC, 0); \ for (_i = 1; _i < 0x100; _i = _i << 1) \ { \ if (_i & _rbv) \ SET_GPR(RC, GPR(RC) | (_rav & _temp)); \ _temp = _temp << 8; \ } \ }

Definition at line 2051 of file alpha.def.

#define ZAPNOTI_IMPL

Value:
{ \ int _i; \ qword_t _temp = LL(0xff); \ qword_t _rav = GPR(RA); \ qword_t _rbv = IMM; \ \ SET_GPR(RC, 0); \ for (_i = 1; _i < 0x100; _i = _i << 1) \ { \ if (_i & _rbv) \ SET_GPR(RC, GPR(RC) | (_rav & _temp)); \ _temp = _temp << 8; \ } \ }

Function Documentation

DEFINST ( SEXTBI ,

0x01 ,

"sextb" ,

" i,

c" ,

IntALU ,

F_ICOMP| F_IMM,

DGPR(RC) ,

DNA ,

DNA ,

DNA ,

DNA

)

DEFINST ( MAXSW4I ,

0x01 ,

"maxsw4" ,

" a,

i ,

c" ,

IntALU ,

F_ICOMP| F_IMM,

DGPR(RC) ,

DNA ,

DGPR(RA) ,

DNA ,

DNA

)

DEFINST ( MAXSB8I ,

0x01 ,

"maxsb8" ,

" a,

i ,

c" ,

IntALU ,

F_ICOMP| F_IMM,

DGPR(RC) ,

DNA ,

DGPR(RA) ,

DNA ,

DNA

)

DEFINST ( MAXUW4I ,

0x01 ,

"maxuw4" ,

" a,

i ,

c" ,

IntALU ,

F_ICOMP| F_IMM,

DGPR(RC) ,

DNA ,

DGPR(RA) ,

DNA ,

DNA

)

DEFINST ( MAXUB8I ,

0x01 ,

"maxub8" ,

" a,

i ,

c" ,

IntALU ,

F_ICOMP| F_IMM,

DGPR(RC) ,

DNA ,

DGPR(RA) ,

DNA ,

DNA

)

DEFINST ( MINUW4I ,

0x01 ,

"minuw4" ,

" a,

i ,

c" ,

IntALU ,

F_ICOMP| F_IMM,

DGPR(RC) ,

DNA ,

DGPR(RA) ,

DNA ,

DNA

)

DEFINST ( MINUB8I ,

0x01 ,

"minub8" ,

" a,

i ,

c" ,

IntALU ,

F_ICOMP| F_IMM,

DGPR(RC) ,

DNA ,

DGPR(RA) ,

DNA ,

DNA

)

DEFINST ( MINSW4I ,

0x01 ,

"minsw4" ,

" a,

i ,

c" ,

IntALU ,

F_ICOMP| F_IMM,

DGPR(RC) ,

DNA ,

DGPR(RA) ,

DNA ,

DNA

)

DEFINST ( MINSB8I ,

0x01 ,

"minsb8" ,

" a,

i ,

c" ,

IntALU ,

F_ICOMP| F_IMM,

DGPR(RC) ,

DNA ,

DGPR(RA) ,

DNA ,

DNA

)

DEFINST ( FTOIS ,

0x78 ,

"ftois" ,

" A,

c" ,

FloatCVT ,

F_FCOMP ,

DGPR(RC) ,

DNA ,

DFPR(RA) ,

DNA ,

DNA

)

DEFINST ( PKLB ,

0x37 ,

"pklb" ,

" b,

c" ,

IntALU ,

F_ICOMP ,

DGPR(RC) ,

DNA ,

DGPR(RB) ,

DNA ,

DNA

)

DEFINST ( UNPKBL ,

0x35 ,

"unpkbl" ,

" b,

c" ,

IntALU ,

F_ICOMP ,

DGPR(RC) ,

DNA ,

DGPR(RB) ,

DNA ,

DNA

)

DEFINST ( CTTZ ,

0x33 ,

"cttz" ,

" b,

c" ,

IntALU ,

F_ICOMP ,

DGPR(RC) ,

DNA ,

DGPR(RB) ,

DNA ,

DNA

)

DEFINST ( PERR ,

0x31 ,

"perr" ,

" a,

b ,

c" ,

IntALU ,

F_ICOMP ,

DGPR(RC) ,

DNA ,

DGPR(RA) ,

DGPR(RB) ,

DNA

)

DEFINST ( JSR_COROUTINE ,

0x03 ,

"jsr_coroutine" ,

" a,

(b)" ,

IntALU ,

F_CTRL|F_UNCOND| F_INDIRJMP,

DGPR(RA) ,

DNA ,

DGPR(RB) ,

DNA ,

DNA

)

DEFINST ( JSR ,

0x01 ,

"jsr" ,

" a,

(b)" ,

IntALU ,

F_CTRL|F_UNCOND| F_INDIRJMP,

DGPR(RA) ,

DNA ,

DGPR(RB) ,

DNA ,

DNA

)

DEFINST ( WH64 ,

0xf8 ,

"wh64" ,

"(b)" ,

NA ,

NA ,

DNA ,

DNA ,

DNA ,

DNA ,

DNA

)

DEFINST ( ECB ,

0xe8 ,

"ecb" ,

"(b)" ,

NA ,

NA ,

DNA ,

DNA ,

DNA ,

DNA ,

DNA

)

DEFINST ( RPCC ,

0xc0 ,

"rpcc" ,

"a" ,

NA ,

NA ,

DGPR(RA) ,

DNA ,

DNA ,

DNA ,

DNA

)

DEFINST ( FETCH ,

0x80 ,

"fetch" ,

"0(b)" ,

NA ,

NA ,

DNA ,

DNA ,

DNA ,

DNA ,

DNA

)

DEFINST ( MB ,

0x40 ,

"mb" ,

"" ,

NA ,

F_TRAP ,

DNA ,

DNA ,

DNA ,

DNA ,

DNA

)

DEFINST ( TRAPB ,

0x00 ,

"trapb" ,

"" ,

NA ,

F_TRAP ,

DNA ,

DNA ,

DNA ,

DNA ,

DNA

)

DEFINST ( FCMOVGT ,

0x2f ,

"fcmovgt" ,

" A,

B ,

C" ,

FloatADD ,

F_FCOMP ,

DFPR(RC) ,

DNA ,

DFPR(RA) ,

DFPR(RB) ,

DNA

)

DEFINST ( FCMOVGE ,

0x2d ,

"fcmovge" ,

" A,

B ,

C" ,

FloatADD ,

F_FCOMP ,

DFPR(RC) ,

DNA ,

DFPR(RA) ,

DFPR(RB) ,

DNA

)

DEFINST ( FCMOVNE ,

0x2b ,

"fcmovne" ,

" A,

B ,

C" ,

FloatADD ,

F_FCOMP ,

DFPR(RC) ,

DNA ,

DFPR(RA) ,

DFPR(RB) ,

DNA

)

DEFINST ( MF_FPCR ,

0x25 ,

"mf_fpcr" ,

"A" ,

FloatADD ,

F_FCOMP ,

DFPR(RA) ,

DNA ,

DFPCR ,

DNA ,

DNA

)

DEFINST ( CPYSE ,

0x22 ,

"cpyse" ,

" A,

B ,

C" ,

FloatADD ,

F_FCOMP ,

DFPR(RC) ,

DNA ,

DFPR(RA) ,

DFPR(RB) ,

DNA

)

DEFINST ( CPYS ,

0x20 ,

"cpys" ,

" A,

B ,

C" ,

FloatADD ,

F_FCOMP ,

DFPR(RC) ,

DNA ,

DFPR(RA) ,

DFPR(RB) ,

DNA

)

DEFINST ( CVTQT ,

0x3e ,

"cvtqt" ,

" B,

C" ,

FloatADD ,

F_FCOMP ,

DFPR(RC) ,

DNA ,

DFPR(RB) ,

DNA ,

DNA

)

DEFINST ( CVTTQ ,

0x2f ,

"cvttq" ,

" B,

C" ,

FloatADD ,

F_FCOMP ,

DFPR(RC) ,

DNA ,

DFPR(RB) ,

DNA ,

DNA

)

DEFINST ( CMPTLE ,

0x27 ,

"cmptle" ,

" A,

B ,

C" ,

FloatADD ,

F_FCOMP ,

DFPR(RC) ,

DNA ,

DFPR(RA) ,

DFPR(RB) ,

DNA

)

DEFINST ( CMPTEQ ,

0x25 ,

"cmpteq" ,

" A,

B ,

C" ,

FloatADD ,

F_FCOMP ,

DFPR(RC) ,

DNA ,

DFPR(RA) ,

DFPR(RB) ,

DNA

)

DEFINST ( DIVT ,

0x23 ,

"divt" ,

" A,

B ,

C" ,

FloatDIV ,

F_FCOMP ,

DFPR(RC) ,

DNA ,

DFPR(RA) ,

DFPR(RB) ,

DNA

)

DEFINST ( SUBT ,

0x21 ,

"subt" ,

" A,

B ,

C" ,

FloatADD ,

F_FCOMP ,

DFPR(RC) ,

DNA ,

DFPR(RA) ,

DFPR(RB) ,

DNA

)

DEFINST ( DIVS ,

0x03 ,

"divs" ,

" A,

B ,

C" ,

FloatDIV ,

F_FCOMP ,

DFPR(RC) ,

DNA ,

DFPR(RA) ,

DFPR(RB) ,

DNA

)

DEFINST ( SUBS ,

0x01 ,

"subs" ,

" A,

B ,

C" ,

FloatADD ,

F_FCOMP ,

DFPR(RC) ,

DNA ,

DFPR(RA) ,

DFPR(RB) ,

DNA

)

DEFINST ( SQRTT ,

0x2b ,

"sqrtt" ,

" B,

C" ,

NA ,

NA ,

DFPR(RC) ,

DNA ,

DFPR(RB) ,

DNA ,

DNA

)

DEFINST ( ITOFT ,

0x24 ,

"itoft" ,

" a,

C" ,

FloatCVT ,

F_FCOMP ,

DFPR(RC) ,

DNA ,

DGPR(RA) ,

DNA ,

DNA

)

DEFINST ( SQRTS ,

0x0b ,

"sqrts" ,

" B,

C" ,

FloatSQRT ,

F_FCOMP ,

DFPR(RC) ,

DNA ,

DFPR(RB) ,

DNA ,

DNA

)

DEFINST ( ITOFS ,

0x04 ,

"itofs" ,

" a,

C" ,

FloatCVT ,

F_FCOMP ,

DFPR(RC) ,

DNA ,

DGPR(RA) ,

DNA ,

DNA

)

DEFINST ( UMULH ,

0x00 ,

"umulh" ,

" a,

b ,

c" ,

IntMULT ,

F_ICOMP ,

DGPR(RC) ,

DNA ,

DGPR(RA) ,

DGPR(RB) ,

DNA

)

DEFINST ( MULQ ,

0x00 ,

"mulq" ,

" a,

b ,

c" ,

IntMULT ,

F_ICOMP ,

DGPR(RC) ,

DNA ,

DGPR(RA) ,

DGPR(RB) ,

DNA

)

DEFINST ( MULL ,

0x00 ,

"mull" ,

" a,

b ,

c" ,

IntMULT ,

F_ICOMP ,

DGPR(RC) ,

DNA ,

DGPR(RA) ,

DGPR(RB) ,

DNA

)

DEFINST ( EXTQH ,

0x00 ,

"extqh" ,

" a,

b ,

c" ,

IntALU