"I am a person who works hard and plays hard."

Yuan Wei
Second Year Graduate Student Department of Computer Science
University of Virginia Charlottesville, VA 22903
Email: yw3f@cs.virginia.edu


Source Code Analysis

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machine.def File Reference

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Defines

Functions

Variables


Define Documentation

#define _RC_IMPL
 

Value:

{                                                                       \
                                                \
  }

#define _RC_IMPL
 

Value:

{                                                                       \
                                                \
  }

#define _RC_IMPL
 

Value:

{                                                                       \
                                                \
  }

#define _RC_IMPL
 

Value:

{                                                                       \
                                                \
  }

#define _RC_IMPL
 

Value:

{                                                                       \
                                                \
  }

#define _RC_IMPL
 

Value:

{                                                                       \
                                                \
  }

#define _RC_IMPL
 

Value:

{                                                                       \
                                                \
  }

#define _RC_IMPL
 

Value:

{                                                                       \
                                                \
  }

#define _RC_IMPL
 

Value:

{                                                                       \
                                                \
  }

#define _RC_IMPL
 

Value:

{                                                                       \
                                                \
  }

#define _RC_IMPL
 

Value:

{                                                                       \
                                                \
  }

#define _RC_IMPL
 

Value:

{                                                                       \
                                                \
  }

#define _RC_IMPL
 

Value:

{                                                                       \
                                                \
  }

#define _RC_IMPL
 

Value:

{                                                                       \
                                                \
  }

#define _RC_IMPL
 

Value:

{                                                                       \
                                                \
  }

#define _RC_IMPL
 

Value:

{                                                                       \
                                                \
  }

#define _RC_IMPL
 

Value:

{                                                                       \
                                                \
  }

#define _RC_IMPL
 

Value:

{                                                                       \
                                                \
  }

#define _RC_IMPL
 

Value:

{                                                                       \
                                                \
  }

#define _RS_IMPL
 

Value:

{                                                                       \
                                                \
  }

#define _RS_IMPL
 

Value:

{                                                                       \
                                                \
  }

#define _RS_IMPL
 

Value:

{                                                                       \
                                                \
  }

#define _RS_IMPL
 

Value:

{                                                                       \
                                                \
  }

#define _RS_IMPL
 

Value:

{                                                                       \
                                                \
  }

#define _RS_IMPL
 

Value:

{                                                                       \
                                                \
  }

#define _RS_IMPL
 

Value:

{                                                                       \
                                                \
  }

#define _RS_IMPL
 

Value:

{                                                                       \
                                                \
  }

#define _RS_IMPL
 

Value:

{                                                                       \
                                                \
  }

#define _RS_IMPL
 

Value:

{                                                                       \
                                                \
  }

#define _RS_IMPL
 

Value:

{                                                                       \
                                                \
  }

#define _RS_IMPL
 

Value:

{                                                                       \
                                                \
  }

#define _RS_IMPL
 

Value:

{                                                                       \
                                                \
  }

#define _RS_IMPL
 

Value:

{                                                                       \
                                                \
  }

#define _RS_IMPL
 

Value:

{                                                                       \
                                                \
  }

#define _RS_IMPL
 

Value:

{                                                                       \
                                                \
  }

#define _RS_IMPL
 

Value:

{                                                                       \
                                                \
  }

#define _RS_IMPL
 

Value:

{                                                                       \
                                                \
  }

#define _RS_IMPL
 

Value:

{                                                                       \
                                                \
  }

#define ADDL_IMPL
 

Value:

{                                                                       \
    SET_GPR(RC, SEXT32((GPR(RA) + GPR(RB)) & ULL(0xffffffff)));         \
  }

Definition at line 877 of file machine.def.

#define ADDL_IMPL
 

Value:

{                                                                       \
    SET_GPR(RC, SEXT32((GPR(RA) + GPR(RB)) & ULL(0xffffffff)));         \
  }

Definition at line 877 of file machine.def.

#define ADDL_IMPL
 

Value:

{                                                                       \
    SET_GPR(RC, SEXT32((GPR(RA) + GPR(RB)) & ULL(0xffffffff)));         \
  }

Definition at line 877 of file machine.def.

#define ADDL_IMPL
 

Value:

{                                                                       \
    SET_GPR(RC, SEXT32((GPR(RA) + GPR(RB)) & ULL(0xffffffff)));         \
  }

Definition at line 877 of file machine.def.

#define ADDL_IMPL
 

Value:

{                                                                       \
    SET_GPR(RC, SEXT32((GPR(RA) + GPR(RB)) & ULL(0xffffffff)));         \
  }

Definition at line 877 of file machine.def.

#define ADDL_IMPL
 

Value:

{                                                                       \
    SET_GPR(RC, SEXT32((GPR(RA) + GPR(RB)) & ULL(0xffffffff)));         \
  }

Definition at line 877 of file machine.def.

#define ADDL_IMPL
 

Value:

{                                                                       \
    SET_GPR(RC, SEXT32((GPR(RA) + GPR(RB)) & ULL(0xffffffff)));         \
  }

Definition at line 877 of file machine.def.

#define ADDL_IMPL
 

Value:

{                                                                       \
    SET_GPR(RC, SEXT32((GPR(RA) + GPR(RB)) & ULL(0xffffffff)));         \
  }

Definition at line 877 of file machine.def.

#define ADDL_IMPL
 

Value:

{                                                                       \
    SET_GPR(RC, SEXT32((GPR(RA) + GPR(RB)) & ULL(0xffffffff)));         \
  }

Definition at line 877 of file machine.def.

#define ADDL_IMPL
 

Value:

{                                                                       \
    SET_GPR(RC, SEXT32((GPR(RA) + GPR(RB)) & ULL(0xffffffff)));         \
  }

Definition at line 877 of file machine.def.

#define ADDL_IMPL
 

Value:

{                                                                       \
    SET_GPR(RC, SEXT32((GPR(RA) + GPR(RB)) & ULL(0xffffffff)));         \
  }

Definition at line 877 of file machine.def.

#define ADDL_IMPL
 

Value:

{                                                                       \
    SET_GPR(RC, SEXT32((GPR(RA) + GPR(RB)) & ULL(0xffffffff)));         \
  }

Definition at line 877 of file machine.def.

#define ADDL_IMPL
 

Value:

{                                                                       \
    SET_GPR(RC, SEXT32((GPR(RA) + GPR(RB)) & ULL(0xffffffff)));         \
  }

Definition at line 877 of file machine.def.

#define ADDL_IMPL
 

Value:

{                                                                       \
    SET_GPR(RC, SEXT32((GPR(RA) + GPR(RB)) & ULL(0xffffffff)));         \
  }

Definition at line 877 of file machine.def.

#define ADDL_IMPL
 

Value:

{                                                                       \
    SET_GPR(RC, SEXT32((GPR(RA) + GPR(RB)) & ULL(0xffffffff)));         \
  }

Definition at line 877 of file machine.def.

#define ADDL_IMPL
 

Value:

{                                                                       \
    SET_GPR(RC, SEXT32((GPR(RA) + GPR(RB)) & ULL(0xffffffff)));         \
  }

Definition at line 877 of file machine.def.

#define ADDL_IMPL
 

Value:

{                                                                       \
    SET_GPR(RC, SEXT32((GPR(RA) + GPR(RB)) & ULL(0xffffffff)));         \
  }

Definition at line 877 of file machine.def.

#define ADDL_IMPL
 

Value:

{                                                                       \
    SET_GPR(RC, SEXT32((GPR(RA) + GPR(RB)) & ULL(0xffffffff)));         \
  }

Definition at line 877 of file machine.def.

#define ADDL_IMPL
 

Value:

{                                                                       \
    SET_GPR(RC, SEXT32((GPR(RA) + GPR(RB)) & ULL(0xffffffff)));         \
  }

Definition at line 877 of file machine.def.

#define ADDLI_IMPL
 

Value:

{                                                                       \
    SET_GPR(RC, SEXT32((GPR(RA) + IMM) & ULL(0xffffffff)));             \
  }

#define ADDLI_IMPL
 

Value:

{                                                                       \
    SET_GPR(RC, SEXT32((GPR(RA) + IMM) & ULL(0xffffffff)));             \
  }

#define ADDLI_IMPL
 

Value:

{                                                                       \
    SET_GPR(RC, SEXT32((GPR(RA) + IMM) & ULL(0xffffffff)));             \
  }

#define ADDLI_IMPL
 

Value:

{                                                                       \
    SET_GPR(RC, SEXT32((GPR(RA) + IMM) & ULL(0xffffffff)));             \
  }

#define ADDLI_IMPL
 

Value:

{                                                                       \
    SET_GPR(RC, SEXT32((GPR(RA) + IMM) & ULL(0xffffffff)));             \
  }

#define ADDLI_IMPL
 

Value:

{                                                                       \
    SET_GPR(RC, SEXT32((GPR(RA) + IMM) & ULL(0xffffffff)));             \
  }

#define ADDLI_IMPL
 

Value:

{                                                                       \
    SET_GPR(RC, SEXT32((GPR(RA) + IMM) & ULL(0xffffffff)));             \
  }

#define ADDLI_IMPL
 

Value:

{                                                                       \
    SET_GPR(RC, SEXT32((GPR(RA) + IMM) & ULL(0xffffffff)));             \
  }

#define ADDLI_IMPL
 

Value:

{                                                                       \
    SET_GPR(RC, SEXT32((GPR(RA) + IMM) & ULL(0xffffffff)));             \
  }

#define ADDLI_IMPL
 

Value:

{                                                                       \
    SET_GPR(RC, SEXT32((GPR(RA) + IMM) & ULL(0xffffffff)));             \
  }

#define ADDLI_IMPL
 

Value:

{                                                                       \
    SET_GPR(RC, SEXT32((GPR(RA) + IMM) & ULL(0xffffffff)));             \
  }

#define ADDLI_IMPL
 

Value:

{                                                                       \
    SET_GPR(RC, SEXT32((GPR(RA) + IMM) & ULL(0xffffffff)));             \
  }

#define ADDLI_IMPL
 

Value:

{                                                                       \
    SET_GPR(RC, SEXT32((GPR(RA) + IMM) & ULL(0xffffffff)));             \
  }

#define ADDLI_IMPL
 

Value:

{                                                                       \
    SET_GPR(RC, SEXT32((GPR(RA) + IMM) & ULL(0xffffffff)));             \
  }

#define ADDLI_IMPL
 

Value:

{                                                                       \
    SET_GPR(RC, SEXT32((GPR(RA) + IMM) & ULL(0xffffffff)));             \
  }

#define ADDLI_IMPL
 

Value:

{                                                                       \
    SET_GPR(RC, SEXT32((GPR(RA) + IMM) & ULL(0xffffffff)));             \
  }

#define ADDLI_IMPL
 

Value:

{                                                                       \
    SET_GPR(RC, SEXT32((GPR(RA) + IMM) & ULL(0xffffffff)));             \
  }

#define ADDLI_IMPL
 

Value:

{                                                                       \
    SET_GPR(RC, SEXT32((GPR(RA) + IMM) & ULL(0xffffffff)));             \
  }

#define ADDLI_IMPL
 

Value:

{                                                                       \
    SET_GPR(RC, SEXT32((GPR(RA) + IMM) & ULL(0xffffffff)));             \
  }

#define ADDLV_IMPL
 

Value:

{                                                                       \
                                \
    SET_GPR(RC, SEXT32((GPR(RA) + GPR(RB)) & ULL(0xffffffff)));         \
  }

Definition at line 1239 of file machine.def.

#define ADDLV_IMPL
 

Value:

{                                                                       \
                                \
    SET_GPR(RC, SEXT32((GPR(RA) + GPR(RB)) & ULL(0xffffffff)));         \
  }

Definition at line 1239 of file machine.def.

#define ADDLV_IMPL
 

Value:

{                                                                       \
                                \
    SET_GPR(RC, SEXT32((GPR(RA) + GPR(RB)) & ULL(0xffffffff)));         \
  }

Definition at line 1239 of file machine.def.

#define ADDLV_IMPL
 

Value:

{                                                                       \
                                \
    SET_GPR(RC, SEXT32((GPR(RA) + GPR(RB)) & ULL(0xffffffff)));         \
  }

Definition at line 1239 of file machine.def.

#define ADDLV_IMPL
 

Value:

{                                                                       \
                                \
    SET_GPR(RC, SEXT32((GPR(RA) + GPR(RB)) & ULL(0xffffffff)));         \
  }

Definition at line 1239 of file machine.def.

#define ADDLV_IMPL
 

Value:

{                                                                       \
                                \
    SET_GPR(RC, SEXT32((GPR(RA) + GPR(RB)) & ULL(0xffffffff)));         \
  }

Definition at line 1239 of file machine.def.

#define ADDLV_IMPL
 

Value:

{                                                                       \
                                \
    SET_GPR(RC, SEXT32((GPR(RA) + GPR(RB)) & ULL(0xffffffff)));         \
  }

Definition at line 1239 of file machine.def.

#define ADDLV_IMPL
 

Value:

{                                                                       \
                                \
    SET_GPR(RC, SEXT32((GPR(RA) + GPR(RB)) & ULL(0xffffffff)));         \
  }

Definition at line 1239 of file machine.def.

#define ADDLV_IMPL
 

Value:

{                                                                       \
                                \
    SET_GPR(RC, SEXT32((GPR(RA) + GPR(RB)) & ULL(0xffffffff)));         \
  }

Definition at line 1239 of file machine.def.

#define ADDLV_IMPL
 

Value:

{                                                                       \
                                \
    SET_GPR(RC, SEXT32((GPR(RA) + GPR(RB)) & ULL(0xffffffff)));         \
  }

Definition at line 1239 of file machine.def.

#define ADDLV_IMPL
 

Value:

{                                                                       \
                                \
    SET_GPR(RC, SEXT32((GPR(RA) + GPR(RB)) & ULL(0xffffffff)));         \
  }

Definition at line 1239 of file machine.def.

#define ADDLV_IMPL
 

Value:

{                                                                       \
                                \
    SET_GPR(RC, SEXT32((GPR(RA) + GPR(RB)) & ULL(0xffffffff)));         \
  }

Definition at line 1239 of file machine.def.

#define ADDLV_IMPL
 

Value:

{                                                                       \
                                \
    SET_GPR(RC, SEXT32((GPR(RA) + GPR(RB)) & ULL(0xffffffff)));         \
  }

Definition at line 1239 of file machine.def.

#define ADDLV_IMPL
 

Value:

{                                                                       \
                                \
    SET_GPR(RC, SEXT32((GPR(RA) + GPR(RB)) & ULL(0xffffffff)));         \
  }

Definition at line 1239 of file machine.def.

#define ADDLV_IMPL
 

Value:

{                                                                       \
                                \
    SET_GPR(RC, SEXT32((GPR(RA) + GPR(RB)) & ULL(0xffffffff)));         \
  }

Definition at line 1239 of file machine.def.

#define ADDLV_IMPL
 

Value:

{                                                                       \
                                \
    SET_GPR(RC, SEXT32((GPR(RA) + GPR(RB)) & ULL(0xffffffff)));         \
  }

Definition at line 1239 of file machine.def.

#define ADDLV_IMPL
 

Value:

{                                                                       \
                                \
    SET_GPR(RC, SEXT32((GPR(RA) + GPR(RB)) & ULL(0xffffffff)));         \
  }

Definition at line 1239 of file machine.def.

#define ADDLV_IMPL
 

Value:

{                                                                       \
                                \
    SET_GPR(RC, SEXT32((GPR(RA) + GPR(RB)) & ULL(0xffffffff)));         \
  }

Definition at line 1239 of file machine.def.

#define ADDLV_IMPL
 

Value:

{                                                                       \
                                \
    SET_GPR(RC, SEXT32((GPR(RA) + GPR(RB)) & ULL(0xffffffff)));         \
  }

Definition at line 1239 of file machine.def.

#define ADDLVI_IMPL
 

Value:

{                                                                       \
                                \
    SET_GPR(RC, SEXT32((GPR(RA) + IMM) & ULL(0xffffffff)));             \
  }

#define ADDLVI_IMPL
 

Value:

{                                                                       \
                                \
    SET_GPR(RC, SEXT32((GPR(RA) + IMM) & ULL(0xffffffff)));             \
  }

#define ADDLVI_IMPL