"I am a person who works hard and plays hard."

Yuan Wei
Second Year Graduate Student Department of Computer Science
University of Virginia Charlottesville, VA 22903
Email: yw3f@cs.virginia.edu


Source Code Analysis

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pisa.c File Reference

#include <stdio.h>
#include <stdlib.h>
#include "host.h"
#include "misc.h"
#include "machine.h"
#include "eval.h"
#include "regs.h"
#include "machine.def"

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Defines

Functions

Variables


Define Documentation

#define CONNECT OP   
 

#define CONNECT OP   
 

#define CONNECT OP   
 

#define CONNECT OP   
 

#define DEFINST OP,
MSK,
NAME,
OPFORM,
RES,
FLAGS,
O1,
O2,
I1,
I2,
I3   
 

Value:

if (md_mask2op[(MSK)]) fatal("doubly defined mask value");              \
  if ((MSK) >= MD_MAX_MASK) fatal("mask value is too large");           \
  md_mask2op[(MSK)]=(OP);

#define DEFINST OP,
MSK,
NAME,
OPFORM,
RES,
FLAGS,
O1,
O2,
I1,
I2,
I3       FLAGS,
 

#define DEFINST OP,
MSK,
NAME,
OPFORM,
RES,
FLAGS,
O1,
O2,
I1,
I2,
I3       RES,
 

#define DEFINST OP,
MSK,
NAME,
OPFORM,
RES,
FLAGS,
O1,
O2,
I1,
I2,
I3       OPFORM,
 

#define DEFINST OP,
MSK,
NAME,
OPFORM,
RES,
FLAGS,
O1,
O2,
I1,
I2,
I3       NAME,
 

#define DEFLINK OP,
MSK,
NAME,
MASK,
SHIFT       NA,
 

#define DEFLINK OP,
MSK,
NAME,
MASK,
SHIFT       FUClass_NA,
 

#define DEFLINK OP,
MSK,
NAME,
MASK,
SHIFT       NULL,
 

#define DEFLINK OP,
MSK,
NAME,
MASK,
SHIFT       NAME,
 


Function Documentation

word_t md_crc_regs struct regs_t   regs
 

Definition at line 544 of file pisa.c.

References crc(), md_ctrl_t::fcc, md_ctrl_t::hi, md_fpr_t::l, md_ctrl_t::lo, regs_t::regs_C, regs_t::regs_F, regs_t::regs_NPC, regs_t::regs_PC, regs_t::regs_R, and word_t.

00545 {
00546   int i;
00547   word_t crc_accum = 0;
00548 
00549   for (i=0; i < MD_NUM_IREGS; i++)
00550     crc_accum = crc(crc_accum, regs->regs_R[i]);
00551 
00552   for (i=0; i < MD_NUM_FREGS; i++)
00553     crc_accum = crc(crc_accum, regs->regs_F.l[i]);
00554 
00555   crc_accum = crc(crc_accum, regs->regs_C.hi);
00556   crc_accum = crc(crc_accum, regs->regs_C.lo);
00557   crc_accum = crc(crc_accum, regs->regs_C.fcc);
00558   crc_accum = crc(crc_accum, regs->regs_PC);
00559   crc_accum = crc(crc_accum, regs->regs_NPC);
00560 
00561   return crc_accum;
00562 }

void md_init_decoder void   
 

Definition at line 588 of file pisa.c.

00589 {
00590   /* FIXME: CONNECT defined? */
00591 #define DEFINST(OP,MSK,NAME,OPFORM,RES,FLAGS,O1,O2,I1,I2,I3)            \
00592   if (md_mask2op[(MSK)]) fatal("doubly defined mask value");            \
00593   if ((MSK) >= MD_MAX_MASK) fatal("mask value is too large");           \
00594   md_mask2op[(MSK)]=(OP);
00595 
00596 #include "machine.def"
00597 }

void md_print_creg md_ctrl_t    regs,
int    reg,
FILE *    stream
 

Definition at line 509 of file pisa.c.

References md_ctrl_t::fcc, md_ctrl_t::hi, md_ctrl_t::lo, and panic().

Referenced by md_print_cregs(), and rspec_dump().

00510 {
00511   /* index is only used to iterate over these registers, hence no enums... */
00512   switch (reg)
00513     {
00514     case 0:
00515       fprintf(stream, "HI: 0x%08x", regs.hi);
00516       break;
00517 
00518     case 1:
00519       fprintf(stream, "LO: 0x%08x", regs.lo);
00520       break;
00521 
00522     case 2:
00523       fprintf(stream, "FCC: 0x%08x", regs.fcc);
00524       break;
00525 
00526     default:
00527       panic("bogus control register index");
00528     }
00529 }

void md_print_cregs md_ctrl_t    regs,
FILE *    stream
 

Definition at line 532 of file pisa.c.

References md_print_creg().

Referenced by dlite_cregs().

00533 {
00534   md_print_creg(regs, 0, stream);
00535   fprintf(stream, "  ");
00536   md_print_creg(regs, 1, stream);
00537   fprintf(stream, "  ");
00538   md_print_creg(regs, 2, stream);
00539   fprintf(stream, "\n");
00540 }

void md_print_fpreg md_fpr_t    regs,
int    reg,
FILE *    stream
 

Definition at line 481 of file pisa.c.

References md_fpr_t::d, md_fpr_t::f, md_fpr_t::l, and md_reg_name().

Referenced by md_print_fpregs(), and rspec_dump().

00482 {
00483   fprintf(stream, "%4s: %12d/0x%08x/%f",
00484           md_reg_name(rt_fpr, reg), regs.l[reg], regs.l[reg], regs.f[reg]);
00485   if (/* even? */!(reg & 1))
00486     {
00487       fprintf(stream, " (%4s as double: %f)",
00488               md_reg_name(rt_dpr, reg/2), regs.d[reg/2]);
00489     }
00490 }

void md_print_fpregs md_fpr_t    regs,
FILE *    stream
 

Definition at line 493 of file pisa.c.

References md_print_fpreg().

Referenced by dlite_fpregs().

00494 {
00495   int i;
00496 
00497   /* floating point registers */
00498   for (i=0; i < MD_NUM_FREGS; i += 2)
00499     {
00500       md_print_fpreg(regs, i, stream);
00501       fprintf(stream, "\n");
00502 
00503       md_print_fpreg(regs, i+1, stream);
00504       fprintf(stream, "\n");
00505     }
00506 }

void md_print_insn md_inst_t    inst,
md_addr_t    pc,
FILE *    stream
 

Definition at line 601 of file pisa.c.

References BCODE, BS, FD, FS, FT, MD_OP_FORMAT, MD_OP_NAME, MD_SET_OPCODE, panic(), RD, RS, RT, s, SHAMT, and UIMM.

Referenced by __ptrace_newinst(), dlite_dis(), dlite_status(), ruu_commit(), ruu_dispatch(), ruu_dumpent(), and sim_main().

00604 {
00605   enum md_opcode op;
00606 
00607   /* use stderr as default output stream */
00608   if (!stream)
00609     stream = stderr;
00610 
00611   /* decode the instruction, assumes predecoded text segment */
00612   MD_SET_OPCODE(op, inst);
00613 
00614   /* disassemble the instruction */
00615   if (op == OP_NA || op >= OP_MAX)
00616     {
00617       /* bogus instruction */
00618       fprintf(stream, "<invalid inst: 0x%08x:%08x>", inst.a, inst.b);
00619     }
00620   else
00621     {
00622       char *s;
00623 
00624       fprintf(stream, "%-10s", MD_OP_NAME(op));
00625 
00626       s = MD_OP_FORMAT(op);
00627       while (*s) {
00628         switch (*s) {
00629         case 'd':
00630           fprintf(stream, "r%d", RD);
00631           break;
00632         case 's':
00633           fprintf(stream, "r%d", RS);
00634           break;
00635         case 't':
00636           fprintf(stream, "r%d", RT);
00637           break;
00638         case 'b':
00639           fprintf(stream, "r%d", BS);
00640           break;
00641         case 'D':
00642           fprintf(stream, "f%d", FD);
00643           break;
00644         case 'S':
00645           fprintf(stream, "f%d", FS);
00646           break;
00647         case 'T':
00648           fprintf(stream, "f%d", FT);
00649           break;
00650         case 'j':
00651           fprintf(stream, "0x%x", (pc + 8 + (OFS << 2)));
00652           break;
00653         case 'o':
00654         case 'i':
00655           fprintf(stream, "%d", IMM);
00656           break;
00657         case 'H':
00658           fprintf(stream, "%d", SHAMT);
00659           break;
00660         case 'u':
00661           fprintf(stream, "%u", UIMM);
00662           break;
00663         case 'U':
00664           fprintf(stream, "0x%x", UIMM);
00665           break;
00666         case 'J':
00667           fprintf(stream, "0x%x", ((pc & 036000000000) | (TARG << 2)));
00668           break;
00669         case 'B':
00670           fprintf(stream, "0x%x", BCODE);
00671           break;
00672 #if 0 /* FIXME: obsolete... */
00673         case ')':
00674           /* handle pre- or post-inc/dec */
00675           if (SS_COMP_OP == SS_COMP_NOP)
00676             fprintf(stream, ")");
00677           else if (SS_COMP_OP == SS_COMP_POST_INC)
00678             fprintf(stream, ")+");
00679           else if (SS_COMP_OP == SS_COMP_POST_DEC)
00680             fprintf(stream, ")-");
00681           else if (SS_COMP_OP == SS_COMP_PRE_INC)
00682             fprintf(stream, ")^+");
00683           else if (SS_COMP_OP == SS_COMP_PRE_DEC)
00684             fprintf(stream, ")^-");
00685           else if (SS_COMP_OP == SS_COMP_POST_DBL_INC)
00686             fprintf(stream, ")++");
00687           else if (SS_COMP_OP == SS_COMP_POST_DBL_DEC)
00688             fprintf(stream, ")--");
00689           else if (SS_COMP_OP == SS_COMP_PRE_DBL_INC)
00690             fprintf(stream, ")^++");
00691           else if (SS_COMP_OP == SS_COMP_PRE_DBL_DEC)
00692             fprintf(stream, ")^--");
00693           else
00694             panic("bogus SS_COMP_OP");
00695           break;
00696 #endif
00697         default:
00698           /* anything unrecognized, e.g., '.' is just passed through */
00699           fputc(*s, stream);
00700         }
00701         s++;
00702       }
00703     }
00704 }

void md_print_ireg md_gpr_t    regs,
int    reg,
FILE *    stream
 

Definition at line 459 of file pisa.c.

References md_reg_name().

Referenced by md_print_iregs(), and rspec_dump().

00460 {
00461   fprintf(stream, "%4s: %12d/0x%08x",
00462           md_reg_name(rt_gpr, reg), regs[reg], regs[reg]);
00463 }

void md_print_iregs md_gpr_t    regs,
FILE *    stream
 

Definition at line 466 of file pisa.c.

References md_print_ireg().

Referenced by dlite_iregs(), and dlite_regs().

00467 {
00468   int i;
00469 
00470   for (i=0; i < MD_NUM_IREGS; i += 2)
00471     {
00472       md_print_ireg(regs, i, stream);
00473       fprintf(stream, "  ");
00474       md_print_ireg(regs, i+1, stream);
00475       fprintf(stream, "\n");
00476     }
00477 }

char* md_reg_name enum md_reg_type    rt,
int    reg
 

Definition at line 316 of file pisa.c.

References md_reg_names_t::file, md_reg_names_t::reg, and md_reg_names_t::str.

Referenced by md_print_fpreg(), and md_print_ireg().

00317 {
00318   int i;
00319 
00320   for (i=0; md_reg_names[i].str != NULL; i++)
00321     {
00322       if (md_reg_names[i].file == rt && md_reg_names[i].reg == reg)
00323         return md_reg_names[i].str;
00324     }
00325 
00326   /* no found... */
00327   return NULL;
00328 }

char* md_reg_obj struct regs_t   regs,
int    is_write,
enum md_reg_type    rt,
int    reg,
struct eval_value_t   val
 

Definition at line 331 of file pisa.c.

References md_fpr_t::d, et_addr, et_double, et_float, et_int, et_uint, eval_as_addr(), eval_as_double(), eval_as_float(), eval_as_uint(), md_fpr_t::f, md_ctrl_t::fcc, md_ctrl_t::hi, md_fpr_t::l, md_ctrl_t::lo, panic(), regs_t::regs_C, regs_t::regs_F, regs_t::regs_NPC, regs_t::regs_PC, regs_t::regs_R, eval_value_t::type, and eval_value_t::value.

00336 {
00337   switch (rt)
00338     {
00339     case rt_gpr:
00340       if (reg < 0 || reg >= MD_NUM_IREGS)
00341         return "register number out of range";
00342 
00343       if (!is_write)
00344         {
00345           val->type = et_uint;
00346           val->value.as_uint = regs->regs_R[reg];
00347         }
00348       else
00349         regs->regs_R[reg] = eval_as_uint(*val);
00350       break;
00351 
00352     case rt_lpr:
00353       if (reg < 0 || reg >= MD_NUM_FREGS)
00354         return "register number out of range";
00355 
00356       if (!is_write)
00357         {
00358           val->type = et_uint;
00359           val->value.as_uint = regs->regs_F.l[reg];
00360         }
00361       else
00362         regs->regs_F.l[reg] = eval_as_uint(*val);
00363       break;
00364 
00365     case rt_fpr:
00366       if (reg < 0 || reg >= MD_NUM_FREGS)
00367         return "register number out of range";
00368 
00369       if (!is_write)
00370         {
00371           val->type = et_float;
00372           val->value.as_float = regs->regs_F.f[reg];
00373         }
00374       else
00375         regs->regs_F.f[reg] = eval_as_float(*val);
00376       break;
00377 
00378     case rt_dpr:
00379       if (reg < 0 || reg >= MD_NUM_FREGS/2)
00380         return "register number out of range";
00381 
00382       if (!is_write)
00383         {
00384           val->type = et_double;
00385           val->value.as_double = regs->regs_F.d[reg];
00386         }
00387       else
00388         regs->regs_F.d[reg] = eval_as_double(*val);
00389       break;
00390 
00391     case rt_ctrl:
00392       switch (reg)
00393         {
00394         case /* HI */0:
00395           if (!is_write)
00396             {
00397               val->type = et_uint;
00398               val->value.as_uint = regs->regs_C.hi;
00399             }
00400           else
00401             regs->regs_C.hi = eval_as_uint(*val);
00402           break;
00403 
00404         case /* LO */1:
00405           if (!is_write)
00406             {
00407               val->type = et_uint;
00408               val->value.as_uint = regs->regs_C.lo;
00409             }
00410           else
00411             regs->regs_C.lo = eval_as_uint(*val);
00412           break;
00413 
00414         case /* FCC */2:
00415           if (!is_write)
00416             {
00417               val->type = et_int;
00418               val->value.as_int = regs->regs_C.fcc;
00419             }
00420           else
00421             regs->regs_C.fcc = eval_as_uint(*val);
00422           break;
00423 
00424         default:
00425           return "register number out of range";
00426         }
00427       break;
00428 
00429     case rt_PC:
00430       if (!is_write)
00431         {
00432           val->type = et_addr;
00433           val->value.as_addr = regs->regs_PC;
00434         }
00435       else
00436         regs->regs_PC = eval_as_addr(*val);
00437       break;
00438 
00439     case rt_NPC:
00440       if (!is_write)
00441         {
00442           val->type = et_addr;
00443           val->value.as_addr = regs->regs_NPC;
00444         }
00445       else
00446         regs->regs_NPC = eval_as_addr(*val);
00447       break;
00448 
00449     default:
00450       panic("bogus register bank");
00451     }
00452 
00453   /* no error */
00454   return NULL;
00455 }

word_t md_xor_regs struct regs_t   regs
 

Definition at line 566 of file pisa.c.

References md_ctrl_t::fcc, md_ctrl_t::hi, md_fpr_t::l, md_ctrl_t::lo, regs_t::regs_C, regs_t::regs_F, regs_t::regs_NPC, regs_t::regs_PC, regs_t::regs_R, and word_t.

Referenced by ruu_dispatch(), and sim_main().

00567 {
00568   int i;
00569   word_t checksum = 0;
00570 
00571   for (i=0; i < MD_NUM_IREGS; i++)
00572     checksum ^= regs->regs_R[i];
00573 
00574   for (i=0; i < MD_NUM_FREGS; i++)
00575     checksum ^= regs->regs_F.l[i];
00576 
00577   checksum ^= regs->regs_C.hi;
00578   checksum ^= regs->regs_C.lo;
00579   checksum ^= regs->regs_C.fcc;
00580   checksum ^= regs->regs_PC;
00581   checksum ^= regs->regs_NPC;
00582 
00583   return checksum;
00584 }


Variable Documentation

char* md_amode_str[md_amode_NUM]
 

Initial value:

{
  "(const)",            
  "(gp + const)",       
  "(sp + const)",       
  "(fp + const)",       
  "(reg + const)",      
  "(reg + reg)"         
}

Definition at line 162 of file pisa.c.

char* md_fu2name[NUM_FU_CLASSES]
 

Initial value:

 {
  NULL, 
  "fu-int-ALU",
  "fu-int-multiply",
  "fu-int-divide",
  "fu-FP-add/sub",
  "fu-FP-comparison",
  "fu-FP-conversion",
  "fu-FP-multiply",
  "fu-FP-divide",
  "fu-FP-sqrt",
  "rd-port",
  "wr-port"
}

Definition at line 121 of file pisa.c.

word_t md_lr_masks[]
 

Initial value:

 {







  0xffffffff,
  0x00ffffff,
  0x0000ffff,
  0x000000ff,
  0x00000000,

}

Definition at line 146 of file pisa.c.

enum md_opcode md_mask2op[MD_MAX_MASK+1]
 

Definition at line 91 of file pisa.c.

md_inst_t MD_NOP_INST = { NOP, 0 }
 

Definition at line 88 of file pisa.c.

unsigned int md_op2flags[OP_MAX]
 

Initial value:

 {
  NA, 
#define DEFINST(OP,MSK,NAME,OPFORM,RES,FLAGS,O1,O2,I1,I2,I3) 
#define DEFLINK(OP,MSK,NAME,MASK,SHIFT) 
#define CONNECT(OP)

}

Definition at line 137 of file pisa.c.

char* md_op2format[OP_MAX]
 

Initial value:

 {
  NULL, 
#define DEFINST(OP,MSK,NAME,OPFORM,RES,FLAGS,O1,O2,I1,I2,I3) 
#define DEFLINK(OP,MSK,NAME,MASK,SHIFT) 
#define CONNECT(OP)

}

Definition at line 103 of file pisa.c.

enum md_fu_class md_op2fu[OP_MAX]
 

Initial value:

 {
  FUClass_NA, 
#define DEFINST(OP,MSK,NAME,OPFORM,RES,FLAGS,O1,O2,I1,I2,I3) 
#define DEFLINK(OP,MSK,NAME,MASK,SHIFT) 
#define CONNECT(OP)

}

Definition at line 112 of file pisa.c.

char* md_op2name[OP_MAX]
 

Initial value:

 {
  NULL, 
#define DEFINST(OP,MSK,NAME,OPFORM,RES,FLAGS,O1,O2,I1,I2,I3) 
#define DEFLINK(OP,MSK,NAME,MASK,SHIFT) 
#define CONNECT(OP)

}

Definition at line 94 of file pisa.c.

struct md_reg_names_t md_reg_names[]
 

Definition at line 173 of file pisa.c.



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