"I am a person who works hard and plays hard."

Yuan Wei
Second Year Graduate Student Department of Computer Science
University of Virginia Charlottesville, VA 22903
Email: yw3f@cs.virginia.edu


Source Code Analysis

Main Page   Compound List   File List   Compound Members   File Members  

regs.c

Go to the documentation of this file.
00001 /*
00002  * regs.c - architected registers state routines
00003  *
00004  * This file is a part of the SimpleScalar tool suite written by
00005  * Todd M. Austin as a part of the Multiscalar Research Project.
00006  *  
00007  * The tool suite is currently maintained by Doug Burger and Todd M. Austin.
00008  * 
00009  * Copyright (C) 1994, 1995, 1996, 1997, 1998 by Todd M. Austin
00010  *
00011  * This source file is distributed "as is" in the hope that it will be
00012  * useful.  The tool set comes with no warranty, and no author or
00013  * distributor accepts any responsibility for the consequences of its
00014  * use. 
00015  * 
00016  * Everyone is granted permission to copy, modify and redistribute
00017  * this tool set under the following conditions:
00018  * 
00019  *    This source code is distributed for non-commercial use only. 
00020  *    Please contact the maintainer for restrictions applying to 
00021  *    commercial use.
00022  *
00023  *    Permission is granted to anyone to make or distribute copies
00024  *    of this source code, either as received or modified, in any
00025  *    medium, provided that all copyright notices, permission and
00026  *    nonwarranty notices are preserved, and that the distributor
00027  *    grants the recipient permission for further redistribution as
00028  *    permitted by this document.
00029  *
00030  *    Permission is granted to distribute this file in compiled
00031  *    or executable form under the same conditions that apply for
00032  *    source code, provided that either:
00033  *
00034  *    A. it is accompanied by the corresponding machine-readable
00035  *       source code,
00036  *    B. it is accompanied by a written offer, with no time limit,
00037  *       to give anyone a machine-readable copy of the corresponding
00038  *       source code in return for reimbursement of the cost of
00039  *       distribution.  This written offer must permit verbatim
00040  *       duplication by anyone, or
00041  *    C. it is distributed by someone who received only the
00042  *       executable form, and is accompanied by a copy of the
00043  *       written offer of source code that they received concurrently.
00044  *
00045  * In other words, you are welcome to use, share and improve this
00046  * source file.  You are forbidden to forbid anyone else to use, share
00047  * and improve what you give them.
00048  *
00049  * INTERNET: dburger@cs.wisc.edu
00050  * US Mail:  1210 W. Dayton Street, Madison, WI 53706
00051  *
00052  * $Id: regs.c,v 1.1.1.1 2000/05/26 15:18:58 taustin Exp $
00053  *
00054  * $Log: regs.c,v $
00055  * Revision 1.1.1.1  2000/05/26 15:18:58  taustin
00056  * SimpleScalar Tool Set
00057  *
00058  *
00059  * Revision 1.5  1998/08/27 15:53:09  taustin
00060  * implemented host interface description in host.h
00061  * added target interface support
00062  * added support for register and memory contexts
00063  *
00064  * Revision 1.4  1997/03/11  01:19:28  taustin
00065  * updated copyright
00066  * long/int tweaks made for ALPHA target support
00067  *
00068  * Revision 1.3  1997/01/06  16:02:36  taustin
00069  * comments updated
00070  *
00071  * Revision 1.1  1996/12/05  18:52:32  taustin
00072  * Initial revision
00073  *
00074  *
00075  */
00076 
00077 #include <stdio.h>
00078 #include <stdlib.h>
00079 #include <string.h>
00080 
00081 #include "host.h"
00082 #include "misc.h"
00083 #include "machine.h"
00084 #include "loader.h"
00085 #include "regs.h"
00086 
00087 
00088 /* create a register file */
00089 struct regs_t *
00090 regs_create(void)
00091 {
00092   struct regs_t *regs;
00093 
00094   regs = calloc(1, sizeof(struct regs_t));
00095   if (!regs)
00096     fatal("out of virtual memory");
00097 
00098   return regs;
00099 }
00100 
00101 /* initialize architected register state */
00102 void
00103 regs_init(struct regs_t *regs)          /* register file to initialize */
00104 {
00105   /* FIXME: assuming all entries should be zero... */
00106   memset(regs, 0, sizeof(*regs));
00107 
00108   /* regs->regs_R[MD_SP_INDEX] and regs->regs_PC initialized by loader... */
00109 }
00110 
00111 
00112 
00113 
00114 #if 0
00115 
00116 /* floating point register file format */
00117 union regs_FP_t {
00118     md_gpr_t l[MD_NUM_FREGS];                   /* integer word view */
00119     md_SS_FLOAT_TYPE f[SS_NUM_REGS];            /* single-precision FP view */
00120     SS_DOUBLE_TYPE d[SS_NUM_REGS/2];            /* double-precision FP view */
00121 };
00122 
00123 /* floating point register file */
00124 extern union md_regs_FP_t regs_F;
00125 
00126 /* (signed) hi register, holds mult/div results */
00127 extern SS_WORD_TYPE regs_HI;
00128 
00129 /* (signed) lo register, holds mult/div results */
00130 extern SS_WORD_TYPE regs_LO;
00131 
00132 /* floating point condition codes */
00133 extern int regs_FCC;
00134 
00135 /* program counter */
00136 extern SS_ADDR_TYPE regs_PC;
00137 
00138 /* dump all architected register state values to output stream STREAM */
00139 void
00140 regs_dump(FILE *stream)         /* output stream */
00141 {
00142   int i;
00143 
00144   /* stderr is the default output stream */
00145   if (!stream)
00146     stream = stderr;
00147 
00148   /* dump processor register state */
00149   fprintf(stream, "Processor state:\n");
00150   fprintf(stream, "    PC: 0x%08x\n", regs_PC);
00151   for (i=0; i<SS_NUM_REGS; i += 2)
00152     {
00153       fprintf(stream, "    R[%2d]: %12d/0x%08x",
00154               i, regs_R[i], regs_R[i]);
00155       fprintf(stream, "  R[%2d]: %12d/0x%08x\n",
00156               i+1, regs_R[i+1], regs_R[i+1]);
00157     }
00158   fprintf(stream, "    HI:      %10d/0x%08x  LO:      %10d/0x%08x\n",
00159           regs_HI, regs_HI, regs_LO, regs_LO);
00160   for (i=0; i<SS_NUM_REGS; i += 2)
00161     {
00162       fprintf(stream, "    F[%2d]: %12d/0x%08x",
00163               i, regs_F.l[i], regs_F.l[i]);
00164       fprintf(stream, "  F[%2d]: %12d/0x%08x\n",
00165               i+1, regs_F.l[i+1], regs_F.l[i+1]);
00166     }
00167   fprintf(stream, "    FCC:                0x%08x\n", regs_FCC);
00168 }
00169 
00170 /* (signed) integer register file */
00171 SS_WORD_TYPE regs_R[SS_NUM_REGS];
00172 
00173 /* floating point register file */
00174 union regs_FP regs_F;
00175 
00176 /* (signed) hi register, holds mult/div results */
00177 SS_WORD_TYPE regs_HI;
00178 /* (signed) lo register, holds mult/div results */
00179 SS_WORD_TYPE regs_LO;
00180 
00181 /* floating point condition codes */
00182 int regs_FCC;
00183 
00184 /* program counter */
00185 SS_ADDR_TYPE regs_PC;
00186 
00187 #endif


UVa CS Department of Computer Science
School of Engineering, University of Virginia
151 Engineer's Way, P.O. Box 400740
Charlottesville, Virginia 22904-4740

(434) 982-2200  Fax: (434) 982-2214