"I am a person who works hard and plays hard."

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Yuan Wei
Second Year Graduate Student Department of Computer Science
University of Virginia Charlottesville, VA 22903
Email: yw3f@cs.virginia.edu

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Source Code Analysis
         

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sim-cheetah.c File Reference

#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include "host.h"
#include "misc.h"
#include "machine.h"
#include "regs.h"
#include "memory.h"
#include "loader.h"
#include "syscall.h"
#include "dlite.h"
#include "options.h"
#include "stats.h"
#include "libcheetah/libcheetah.h"
#include "sim.h"
#include "machine.def"

Include dependency graph for sim-cheetah.c:

Go to the source code of this file.

Defines

• #define LIBCHEETAH_MAX_INST   2147483647
• #define REFS_INST   0x01
• #define REFS_DATA   0x02
• #define SET_NPC(EXPR)   (regs.regs_NPC = (EXPR))
• #define CPC   (regs.regs_PC)
• #define GPR(N)   (regs.regs_R[N])
• #define SET_GPR(N, EXPR)   (regs.regs_R[N] = (EXPR))
• #define FPR_Q(N)   (regs.regs_F.q[N])
• #define SET_FPR_Q(N, EXPR)   (regs.regs_F.q[N] = (EXPR))
• #define FPR(N)   (regs.regs_F.d[N])
• #define SET_FPR(N, EXPR)   (regs.regs_F.d[N] = (EXPR))
• #define FPCR   (regs.regs_C.fpcr)
• #define SET_FPCR(EXPR)   (regs.regs_C.fpcr = (EXPR))
• #define UNIQ   (regs.regs_C.uniq)
• #define SET_UNIQ(EXPR)   (regs.regs_C.uniq = (EXPR))
• #define READ_BYTE(SRC, FAULT)
• #define READ_HALF(SRC, FAULT)
• #define READ_WORD(SRC, FAULT)
• #define WRITE_BYTE(SRC, DST, FAULT)
• #define WRITE_HALF(SRC, DST, FAULT)
• #define WRITE_WORD(SRC, DST, FAULT)
• #define SYSCALL(INST)   sys_syscall(&regs, cheetah_access_fn, mem, INST, TRUE)
• #define DEFINST(OP, MSK, NAME, OPFORM, RES, FLAGS, O1, O2, I1, I2, I3)
• #define DEFLINK(OP, MSK, NAME, MASK, SHIFT)
• #define CONNECT(OP)
• #define DECLARE_FAULT(FAULT)   { fault = (FAULT); break; }

Functions

• void sim_reg_options (struct opt_odb_t *odb)
• void sim_check_options (struct opt_odb_t *odb, int argc, char **argv)
• void sim_reg_stats (struct stat_sdb_t *sdb)
• void sim_init (void)
• char * cheetah_mstate_obj (FILE *stream, char *cmd, struct regs_t *regs, struct mem_t *mem)
• void sim_load_prog (char *fname, int argc, char **argv, char **envp)
• void sim_aux_config (FILE *stream)
• void sim_aux_stats (FILE *stream)
• void sim_uninit (void)
• enum md_fault_type cheetah_access_fn (struct mem_t *mem, enum mem_cmd cmd, md_addr_t addr, void *p, int nbytes)
• void sim_main (void)

Variables

• regs_t regs
• mem_t * mem = NULL
• counter_t sim_num_refs = 0
• unsigned int max_insts
• char * repl_str
• char * conf_str
• int min_sets
• int max_sets
• int line_size
• int max_assoc
• int cache_interval
• int max_cache
• int cache_size
• char * ref_stream
• int refs
• int lib_argc = 0
• char * lib_argv [16]

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Define Documentation

#define CONNECT (  OP    )

#define CPC   (regs.regs_PC)

Definition at line 386 of file sim-cheetah.c.

#define DECLARE_FAULT (  FAULT    )     { fault = (FAULT); break; }

#define DEFINST (  OP, MSK, NAME, OPFORM, RES, FLAGS, O1, O2, I1, I2, I3    )

Value: case OP: \ SYMCAT(OP,_IMPL); \ break;

#define DEFLINK (  OP, MSK, NAME, MASK, SHIFT    )

Value: case OP: \ panic("attempted to execute a linking opcode");

#define FPCR   (regs.regs_C.fpcr)

Definition at line 419 of file sim-cheetah.c.

#define FPR (  N    )     (regs.regs_F.d[N])

Definition at line 415 of file sim-cheetah.c.

#define FPR_Q (  N    )     (regs.regs_F.q[N])

Definition at line 413 of file sim-cheetah.c.

#define GPR (  N    )     (regs.regs_R[N])

Definition at line 389 of file sim-cheetah.c.

#define LIBCHEETAH_MAX_INST   2147483647

Definition at line 119 of file sim-cheetah.c. Referenced by sim_check_options(), and sim_reg_options().

#define READ_BYTE (  SRC, FAULT    )

Value: (addr = (SRC), \ ((refs & REFS_DATA) ? cheetah_access(addr) : (void)0), \ (FAULT) = md_fault_none, MEM_READ_BYTE(mem, addr)) Definition at line 429 of file sim-cheetah.c.

#define READ_HALF (  SRC, FAULT    )

Value: (addr = (SRC), \ ((refs & REFS_DATA) ? cheetah_access(addr) : (void)0), \ (FAULT) = md_fault_none, MEM_READ_HALF(mem, addr)) Definition at line 433 of file sim-cheetah.c.

#define READ_WORD (  SRC, FAULT    )

Value: (addr = (SRC), \ ((refs & REFS_DATA) ? cheetah_access(addr) : (void)0), \ (FAULT) = md_fault_none, MEM_READ_WORD(mem, addr)) Definition at line 437 of file sim-cheetah.c.

#define REFS_DATA   0x02

Definition at line 165 of file sim-cheetah.c. Referenced by cheetah_access_fn(), and sim_check_options().

#define REFS_INST   0x01

Definition at line 164 of file sim-cheetah.c. Referenced by sim_check_options(), and sim_main().

#define SET_FPCR (  EXPR    )     (regs.regs_C.fpcr = (EXPR))

Definition at line 420 of file sim-cheetah.c.

#define SET_FPR (  N, EXPR    )     (regs.regs_F.d[N] = (EXPR))

Definition at line 416 of file sim-cheetah.c.

#define SET_FPR_Q (  N, EXPR    )     (regs.regs_F.q[N] = (EXPR))

Definition at line 414 of file sim-cheetah.c.

#define SET_GPR (  N, EXPR    )     (regs.regs_R[N] = (EXPR))

Definition at line 390 of file sim-cheetah.c.

#define SET_NPC (  EXPR    )     (regs.regs_NPC = (EXPR))

Definition at line 383 of file sim-cheetah.c.

#define SET_UNIQ (  EXPR    )     (regs.regs_C.uniq = (EXPR))

Definition at line 422 of file sim-cheetah.c.

#define SYSCALL (  INST    )     sys_syscall(&regs, cheetah_access_fn, mem, INST, TRUE)

Definition at line 481 of file sim-cheetah.c.

#define UNIQ   (regs.regs_C.uniq)

Definition at line 421 of file sim-cheetah.c.

#define WRITE_BYTE (  SRC, DST, FAULT    )

Value: (addr = (DST), \ ((refs & REFS_DATA) ? cheetah_access(addr) : (void)0), \ (FAULT) = md_fault_none, MEM_WRITE_BYTE(mem, addr, (SRC))) Definition at line 448 of file sim-cheetah.c.

#define WRITE_HALF (  SRC, DST, FAULT    )

Value: (addr = (DST), \ ((refs & REFS_DATA) ? cheetah_access(addr) : (void)0), \ (FAULT) = md_fault_none, MEM_WRITE_HALF(mem, addr, (SRC))) Definition at line 452 of file sim-cheetah.c.

#define WRITE_WORD (  SRC, DST, FAULT    )

Value: (addr = (DST), \ ((refs & REFS_DATA) ? cheetah_access(addr) : (void)0), \ (FAULT) = md_fault_none, MEM_WRITE_WORD(mem, addr, (SRC))) Definition at line 456 of file sim-cheetah.c.

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Function Documentation

enum md_fault_type cheetah_access_fn (  struct mem_t *    mem, enum mem_cmd    cmd, md_addr_t    addr, void *    p, int    nbytes )

Definition at line 469 of file sim-cheetah.c. References cheetah_access(), mem_access(), mem_cmd, refs, and REFS_DATA. { if (refs & REFS_DATA) cheetah_access(addr); return mem_access(mem, cmd, addr, p, nbytes); }

char* cheetah_mstate_obj (  FILE *    stream, char *    cmd, struct regs_t *    regs, struct mem_t *    mem )  [static]

Definition at line 315 of file sim-cheetah.c. References cheetah_stats(), MAX, stat_print_stats(), and TRUE. Referenced by sim_load_prog(). { sim_end_time = time((time_t *)NULL); sim_elapsed_time = MAX(sim_end_time - sim_start_time, 1); /* print simulation stats */ fprintf(stream, "\nsim: ** simulation statistics **\n"); stat_print_stats(sim_sdb, stream); /* print libcheetah stats */ cheetah_stats(stream, /* mid */TRUE); /* no error */ return NULL; }

void sim_aux_config (  FILE *    stream )

Definition at line 352 of file sim-cheetah.c. References cheetah_config(). { /* print libcheetah configuration */ cheetah_config(stream); }

void sim_aux_stats (  FILE *    stream )

Definition at line 360 of file sim-cheetah.c. References cheetah_stats(), and FALSE. { /* print libcheetah stats */ cheetah_stats(stream, /* final */FALSE); }

void sim_check_options (  struct opt_odb_t *    odb, int    argc, char **    argv )

Definition at line 224 of file sim-cheetah.c. References cache_interval, cache_size, conf_str, fatal(), lib_argc, lib_argv, LIBCHEETAH_MAX_INST, line_size, max_assoc, max_cache, max_insts, max_sets, min_sets, mystrdup(), ref_stream, refs, REFS_DATA, REFS_INST, repl_str, and warn(). { char buf[512]; fprintf(stderr, "Portions Copyright (C) 1989-1993 by " "Rabin A. Sugumar and Santosh G. Abraham.\n"); if (max_insts == 0 || max_insts > LIBCHEETAH_MAX_INST) { warn("sim-cheetah can only process %d instructions", LIBCHEETAH_MAX_INST); max_insts = LIBCHEETAH_MAX_INST; } if (!strcmp(ref_stream, "none")) refs = 0; else if (!strcmp(ref_stream, "inst")) refs = REFS_INST; else if (!strcmp(ref_stream, "data")) refs = REFS_DATA; else if (!strcmp(ref_stream, "unified")) refs = (REFS_INST|REFS_DATA); else fatal("bad reference stream specifier, use {inst|data|unified}"); /* marshall up the libcheetah arguments */ lib_argc = 0; sprintf(buf, "-R%s", repl_str); lib_argv[lib_argc++] = mystrdup(buf); sprintf(buf, "-C%s", conf_str); lib_argv[lib_argc++] = mystrdup(buf); sprintf(buf, "-a%d", min_sets); lib_argv[lib_argc++] = mystrdup(buf); sprintf(buf, "-b%d", max_sets); lib_argv[lib_argc++] = mystrdup(buf); sprintf(buf, "-l%d", line_size); lib_argv[lib_argc++] = mystrdup(buf); sprintf(buf, "-n%d", max_assoc); lib_argv[lib_argc++] = mystrdup(buf); sprintf(buf, "-i%d", cache_interval); lib_argv[lib_argc++] = mystrdup(buf); sprintf(buf, "-M%d", max_cache); lib_argv[lib_argc++] = mystrdup(buf); sprintf(buf, "-c%d", cache_size); lib_argv[lib_argc++] = mystrdup(buf); }

void sim_init (  void    )

Definition at line 301 of file sim-cheetah.c. References mem_create(), mem_init(), regs_init(), and sim_num_refs. { sim_num_refs = 0; /* allocate and initialize register file */ regs_init(&regs); /* allocate and initialize memory space */ mem = mem_create("mem"); mem_init(mem); }

void sim_load_prog (  char *    fname, int    argc, char **    argv, char **    envp )

Definition at line 336 of file sim-cheetah.c. References cheetah_init(), cheetah_mstate_obj(), dlite_init(), ld_load_prog(), lib_argc, lib_argv, and TRUE. { /* load program text and data, set up environment, memory, and regs */ ld_load_prog(fname, argc, argv, envp, &regs, mem, TRUE); /* initialize the DLite debugger */ dlite_init(md_reg_obj, dlite_mem_obj, cheetah_mstate_obj); /* initialize libcheetah */ cheetah_init(lib_argc, lib_argv); }

void sim_main (  void    )

Definition at line 485 of file sim-cheetah.c. References ACCESS_READ, ACCESS_WRITE, cheetah_access(), md_fpr_t::d, dlite_check_break, dlite_main(), FALSE, fatal(), max_insts, MD_FETCH_INST, MD_OP_FLAGS, MD_SET_OPCODE, panic(), refs, REFS_INST, regs_t::regs_F, regs_t::regs_NPC, regs_t::regs_PC, regs_t::regs_R, sim_num_refs, and TRUE. { md_inst_t inst; register md_addr_t addr; enum md_opcode op; register int is_write; enum md_fault_type fault; fprintf(stderr, "sim: ** starting functional simulation **\n"); /* set up initial default next PC */ regs.regs_NPC = regs.regs_PC + sizeof(md_inst_t); /* check for DLite debugger entry condition */ if (dlite_check_break(regs.regs_PC, /* no access */0, /* addr */0, 0, 0)) dlite_main(regs.regs_PC - sizeof(md_inst_t), regs.regs_PC, sim_num_insn, &regs, mem); while (TRUE) { /* maintain $r0 semantics */ regs.regs_R[MD_REG_ZERO] = 0; #ifdef TARGET_ALPHA regs.regs_F.d[MD_REG_ZERO] = 0.0; #endif /* TARGET_ALPHA */ /* get the next instruction to execute */ if (refs & REFS_INST) cheetah_access(regs.regs_PC); MD_FETCH_INST(inst, mem, regs.regs_PC); /* keep an instruction count */ sim_num_insn++; /* set default reference address and access mode */ addr = 0; is_write = FALSE; /* set default fault - none */ fault = md_fault_none; /* decode the instruction */ MD_SET_OPCODE(op, inst); /* execute the instruction */ switch (op) { #define DEFINST(OP,MSK,NAME,OPFORM,RES,FLAGS,O1,O2,I1,I2,I3) \ case OP: \ SYMCAT(OP,_IMPL); \ break; #define DEFLINK(OP,MSK,NAME,MASK,SHIFT) \ case OP: \ panic("attempted to execute a linking opcode"); #define CONNECT(OP) #define DECLARE_FAULT(FAULT) \ { fault = (FAULT); break; } #include "machine.def" default: panic("attempted to execute a bogus opcode"); } if (fault != md_fault_none) fatal("fault (%d) detected @ 0x%08p", fault, regs.regs_PC); if (MD_OP_FLAGS(op) & F_MEM) { sim_num_refs++; if (MD_OP_FLAGS(op) & F_STORE) is_write = TRUE; } /* check for DLite debugger entry condition */ if (dlite_check_break(regs.regs_NPC, is_write ? ACCESS_WRITE : ACCESS_READ, addr, sim_num_insn, sim_num_insn)) dlite_main(regs.regs_PC, regs.regs_NPC, sim_num_insn, &regs, mem); /* go to the next instruction */ regs.regs_PC = regs.regs_NPC; regs.regs_NPC += sizeof(md_inst_t); /* finish early? */ if (max_insts && sim_num_insn >= max_insts) return; } }

void sim_reg_options (  struct opt_odb_t *    odb )

Definition at line 170 of file sim-cheetah.c. References cache_interval, cache_size, conf_str, LIBCHEETAH_MAX_INST, line_size, max_assoc, max_cache, max_insts, max_sets, min_sets, opt_reg_header(), opt_reg_int(), opt_reg_string(), opt_reg_uint(), ref_stream, repl_str, and TRUE. { opt_reg_header(odb, "sim-cheetah: This program implements a functional simulator driver for\n" "Cheetah. Cheetah is a cache simulation package written by Rabin Sugumar\n" "and Santosh Abraham which can efficiently simulate multiple cache\n" "configurations in a single run of a program. Specifically, Cheetah can\n" "simulate ranges of single level set-associative and fully-associative\n" "caches. See the directory libcheetah/ for more details on Cheetah.\n" ); /* instruction limit */ opt_reg_uint(odb, "-max:inst", "maximum number of inst's to execute", &max_insts, /* default */LIBCHEETAH_MAX_INST, /* print */TRUE, /* format */NULL); opt_reg_string(odb, "-refs", "reference stream to analyze, i.e., {none|inst|data|unified}", &ref_stream, "data", /* print */TRUE, /* format */NULL); opt_reg_string(odb, "-R", "replacement policy, i.e., lru or opt", &repl_str, "lru", /* print */TRUE, /* format */NULL); opt_reg_string(odb, "-C", "cache configuration, i.e., fa, sa, or dm", &conf_str, "sa", /* print */TRUE, /* format */NULL); opt_reg_int(odb, "-a", "min number of sets (log base 2, line size for DM)", &min_sets, 7, /* print */TRUE, /* format */NULL); opt_reg_int(odb, "-b", "max number of sets (log base 2, line size for DM)", &max_sets, 14, /* print */TRUE, /* format */NULL); opt_reg_int(odb, "-l", "line size of the caches (log base 2)", &line_size, 4, /* print */TRUE, /* format */NULL); opt_reg_int(odb, "-n", "max degree of associativity to analyze (log base 2)", &max_assoc, 1, /* print */TRUE, /* format */NULL); opt_reg_int(odb, "-in", "cache size intervals at which miss ratio is shown", &cache_interval, 512, /* print */TRUE, /* format */NULL); opt_reg_int(odb, "-M", "maximum cache size of interest", &max_cache, 524288, /* print */TRUE, /* format */NULL); opt_reg_int(odb, "-c", "size of cache (log base 2) for DM analysis", &cache_size, 16, /* print */TRUE, /* format */NULL); }

void sim_reg_stats (  struct stat_sdb_t *    sdb )

Definition at line 283 of file sim-cheetah.c. References sim_num_refs, stat_reg_counter, stat_reg_formula(), and stat_reg_int(). { stat_reg_counter(sdb, "sim_num_insn", "total number of instructions executed", &sim_num_insn, sim_num_insn, NULL); stat_reg_counter(sdb, "sim_num_refs", "total number of loads and stores executed", &sim_num_refs, 0, NULL); stat_reg_int(sdb, "sim_elapsed_time", "total simulation time in seconds", (int *)&sim_elapsed_time, 0, NULL); stat_reg_formula(sdb, "sim_inst_rate", "simulation speed (in insts/sec)", "sim_num_insn / sim_elapsed_time", NULL); }

void sim_uninit (  void    )

Definition at line 368 of file sim-cheetah.c. { /* nada */ }

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Variable Documentation

int cache_interval [static]

Definition at line 152 of file sim-cheetah.c. Referenced by sim_check_options(), and sim_reg_options().

int cache_size [static]

Definition at line 158 of file sim-cheetah.c. Referenced by sim_check_options(), and sim_reg_options().

char* conf_str [static]

Definition at line 137 of file sim-cheetah.c. Referenced by sim_check_options(), and sim_reg_options().

int lib_argc = 0 [static]

Definition at line 219 of file sim-cheetah.c. Referenced by sim_check_options(), and sim_load_prog().

char* lib_argv[16] [static]

Definition at line 220 of file sim-cheetah.c. Referenced by sim_check_options(), and sim_load_prog().

int line_size [static]

Definition at line 146 of file sim-cheetah.c. Referenced by sim_check_options(), and sim_reg_options().

int max_assoc [static]

Definition at line 149 of file sim-cheetah.c. Referenced by sim_check_options(), and sim_reg_options().

int max_cache [static]

Definition at line 155 of file sim-cheetah.c. Referenced by sim_check_options(), and sim_reg_options().

unsigned int max_insts [static]

Definition at line 131 of file sim-cheetah.c. Referenced by sim_check_options(), sim_main(), and sim_reg_options().

int max_sets [static]

Definition at line 143 of file sim-cheetah.c. Referenced by sim_check_options(), and sim_reg_options().

struct mem_t* mem = NULL [static]

Definition at line 125 of file sim-cheetah.c.

int min_sets [static]

Definition at line 140 of file sim-cheetah.c. Referenced by sim_check_options(), and sim_reg_options().

char* ref_stream [static]

Definition at line 161 of file sim-cheetah.c. Referenced by sim_check_options(), and sim_reg_options().

int refs [static]

Definition at line 166 of file sim-cheetah.c. Referenced by cheetah_access_fn(), sim_check_options(), and sim_main().

struct regs_t regs [static]

Definition at line 122 of file sim-cheetah.c.

char* repl_str [static]

Definition at line 134 of file sim-cheetah.c. Referenced by sim_check_options(), and sim_reg_options().

counter_t sim_num_refs = 0 [static]

Definition at line 128 of file sim-cheetah.c. Referenced by sim_init(), sim_main(), and sim_reg_stats().

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