"I am a person who works hard and plays hard."

Yuan Wei
Second Year Graduate Student Department of Computer Science
University of Virginia Charlottesville, VA 22903
Email: yw3f@cs.virginia.edu


Source Code Analysis

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sim-eio.c File Reference

#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include "host.h"
#include "misc.h"
#include "machine.h"
#include "regs.h"
#include "memory.h"
#include "loader.h"
#include "syscall.h"
#include "dlite.h"
#include "options.h"
#include "stats.h"
#include "eio.h"
#include "range.h"
#include "sim.h"
#include "machine.def"

Include dependency graph for sim-eio.c:

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Defines

Enumerations

Functions

Variables


Define Documentation

#define CONNECT OP   
 

#define CONNECT OP   
 

#define CPC   (regs.regs_PC)
 

Definition at line 345 of file sim-eio.c.

#define DECLARE_FAULT FAULT       { fault = (FAULT); break; }
 

#define DECLARE_FAULT FAULT       { fault = (FAULT); break; }
 

#define DEFINST OP,
MSK,
NAME,
OPFORM,
RES,
FLAGS,
O1,
O2,
I1,
I2,
I3   
 

Value:

case OP:                                                        \
          SYMCAT(OP,_IMPL);                                             \
          break;

#define DEFINST OP,
MSK,
NAME,
OPFORM,
RES,
FLAGS,
O1,
O2,
I1,
I2,
I3   
 

Value:

case OP:                                                        \
              SYMCAT(OP,_IMPL);                                         \
              break;

#define DEFLINK OP,
MSK,
NAME,
MASK,
SHIFT   
 

Value:

case OP:                                                        \
          panic("attempted to execute a linking opcode");

#define DEFLINK OP,
MSK,
NAME,
MASK,
SHIFT   
 

Value:

case OP:                                                        \
              panic("attempted to execute a linking opcode");

#define FPCR   (regs.regs_C.fpcr)
 

Definition at line 378 of file sim-eio.c.

#define FPR N       (regs.regs_F.d[N])
 

Definition at line 374 of file sim-eio.c.

#define FPR_Q N       (regs.regs_F.q[N])
 

Definition at line 372 of file sim-eio.c.

#define GPR N       (regs.regs_R[N])
 

Definition at line 348 of file sim-eio.c.

#define READ_BYTE SRC,
FAULT       ((FAULT) = md_fault_none, MEM_READ_BYTE(mem, addr = (SRC)))
 

Definition at line 388 of file sim-eio.c.

#define READ_HALF SRC,
FAULT       ((FAULT) = md_fault_none, MEM_READ_HALF(mem, addr = (SRC)))
 

Definition at line 390 of file sim-eio.c.

#define READ_WORD SRC,
FAULT       ((FAULT) = md_fault_none, MEM_READ_WORD(mem, addr = (SRC)))
 

Definition at line 392 of file sim-eio.c.

#define SET_FPCR EXPR       (regs.regs_C.fpcr = (EXPR))
 

Definition at line 379 of file sim-eio.c.

#define SET_FPR N,
EXPR       (regs.regs_F.d[N] = (EXPR))
 

Definition at line 375 of file sim-eio.c.

#define SET_FPR_Q N,
EXPR       (regs.regs_F.q[N] = (EXPR))
 

Definition at line 373 of file sim-eio.c.

#define SET_GPR N,
EXPR       (regs.regs_R[N] = (EXPR))
 

Definition at line 349 of file sim-eio.c.

#define SET_NPC EXPR       (regs.regs_NPC = (EXPR))
 

Definition at line 342 of file sim-eio.c.

#define SET_UNIQ EXPR       (regs.regs_C.uniq = (EXPR))
 

Definition at line 381 of file sim-eio.c.

#define SYSCALL INST   
 

Value:

((trace_fd != NULL && !fastfwding)                                      \
   ? eio_write_trace(trace_fd, sim_num_insn,                            \
                     &regs, mem_access, mem, INST)                      \
   : sys_syscall(&regs, mem_access, mem, INST, TRUE))

Definition at line 411 of file sim-eio.c.

#define UNIQ   (regs.regs_C.uniq)
 

Definition at line 380 of file sim-eio.c.

#define WRITE_BYTE SRC,
DST,
FAULT       ((FAULT) = md_fault_none, MEM_WRITE_BYTE(mem, addr = (DST), (SRC)))
 

Definition at line 399 of file sim-eio.c.

#define WRITE_HALF SRC,
DST,
FAULT       ((FAULT) = md_fault_none, MEM_WRITE_HALF(mem, addr = (DST), (SRC)))
 

Definition at line 401 of file sim-eio.c.

#define WRITE_WORD SRC,
DST,
FAULT       ((FAULT) = md_fault_none, MEM_WRITE_WORD(mem, addr = (DST), (SRC)))
 

Definition at line 403 of file sim-eio.c.


Enumeration Type Documentation

anonymous enum
 

Enumeration values:
no_chkpt 
one_shot_chkpt 
periodic_chkpt 

Definition at line 120 of file sim-eio.c.


Function Documentation

void sim_aux_config FILE *    stream
 

Definition at line 312 of file sim-eio.c.

00313 {
00314   /* nothing currently */
00315 }

void sim_aux_stats FILE *    stream
 

Definition at line 319 of file sim-eio.c.

00320 {
00321   /* nada */
00322 }

void sim_check_options struct opt_odb_t   odb,
int    argc,
char **    argv
 

Definition at line 201 of file sim-eio.c.

References fastfwd_count, and fatal().

00202 {
00203   if (fastfwd_count < 0 || fastfwd_count >= 2147483647)
00204     fatal("bad fast forward count: %d", fastfwd_count);
00205 }

void sim_init void   
 

Definition at line 229 of file sim-eio.c.

References mem_create(), mem_init(), regs_init(), and sim_num_refs.

00230 {
00231   sim_num_refs = 0;
00232 
00233   /* allocate and initialize register file */
00234   regs_init(&regs);
00235 
00236   /* allocate and initialize memory space */
00237   mem = mem_create("mem");
00238   mem_init(mem);
00239 }

void sim_load_prog char *    fname,
int    argc,
char **    argv,
char **    envp
 

Definition at line 243 of file sim-eio.c.

References chkpt_fd, chkpt_fname, chkpt_kind, chkpt_nelt, chkpt_num, chkpt_opts, dlite_init(), eio_create(), fatal(), ld_load_prog(), next_chkpt_cycle, one_shot_chkpt, per_chkpt_interval, per_chkpt_nelt, per_chkpt_opts, periodic_chkpt, range_parse_range(), trace_fd, trace_fname, and TRUE.

00246 {
00247   /* load program text and data, set up environment, memory, and regs */
00248   ld_load_prog(fname, argc, argv, envp, &regs, mem, TRUE);
00249 
00250   if (chkpt_nelt == 2)
00251     {
00252       char *errstr;
00253 
00254       /* generate a checkpoint */
00255       if (!sim_eio_fd)
00256         fatal("checkpoints can only be generated while running an EIO trace");
00257 
00258       /* can't do regular & periodic chkpts at the same time */
00259       if (per_chkpt_nelt != 0)
00260         fatal("can't do both regular and periodic checkpoints");
00261 
00262 #if 0 /* this should work fine... */
00263       if (trace_fname != NULL)
00264         fatal("checkpoints cannot be generated with generating an EIO trace");
00265 #endif
00266 
00267       /* parse the range */
00268       errstr = range_parse_range(chkpt_opts[1], &chkpt_range);
00269       if (errstr)
00270         fatal("cannot parse pipetrace range, use: {<start>}:{<end>}");
00271 
00272       /* create the checkpoint file */
00273       chkpt_fname = chkpt_opts[0];
00274       chkpt_fd = eio_create(chkpt_fname);
00275 
00276       /* indicate checkpointing is now active... */
00277       chkpt_kind = one_shot_chkpt;
00278     }
00279 
00280   if (per_chkpt_nelt == 2)
00281     {
00282       chkpt_fname = per_chkpt_opts[0];
00283       if (strchr(chkpt_fname, '%') == NULL)
00284         fatal("periodic checkpoint filename must be printf-style format");
00285 
00286       if (sscanf(per_chkpt_opts[1], "%Ld", &per_chkpt_interval) != 1)
00287         fatal("can't parse periodic checkpoint interval '%s'",
00288               per_chkpt_opts[1]);
00289 
00290       /* indicate checkpointing is now active... */
00291       chkpt_kind = periodic_chkpt;
00292       chkpt_num = 1;
00293       next_chkpt_cycle = per_chkpt_interval;
00294     }
00295 
00296   if (trace_fname != NULL)
00297     {
00298       fprintf(stderr, "sim: tracing execution to EIO file `%s'...\n",
00299               trace_fname);
00300 
00301       /* create an EIO trace file */
00302       trace_fd = eio_create(trace_fname);
00303     }
00304 
00305   /* initialize the DLite debugger */
00306   dlite_init(md_reg_obj, dlite_mem_obj, dlite_mstate_obj);
00307 }

void sim_main void   
 

Definition at line 419 of file sim-eio.c.

References ACCESS_READ, ACCESS_WRITE, bool_t, chkpt_fd, chkpt_fname, chkpt_kind, chkpt_num, md_fpr_t::d, dlite_check_break, dlite_main(), eio_close(), eio_create(), eio_write_chkpt(), FALSE, fastfwd_count, fastfwding, fatal(), max_insts, MD_FETCH_INST, MD_OP_FLAGS, MD_SET_OPCODE, myfprintf(), next_chkpt_cycle, one_shot_chkpt, panic(), per_chkpt_interval, periodic_chkpt, range_cmp_range1(), regs_t::regs_F, regs_t::regs_NPC, regs_t::regs_PC, regs_t::regs_R, sim_num_refs, trace_fd, and TRUE.

00420 {
00421   md_inst_t inst;
00422   register md_addr_t addr;
00423   enum md_opcode op;
00424   register bool_t is_write;
00425   enum md_fault_type fault;
00426 
00427   /* set up initial default next PC */
00428   regs.regs_NPC = regs.regs_PC + sizeof(md_inst_t);
00429 
00430   /* check for DLite debugger entry condition */
00431   if (dlite_check_break(regs.regs_PC, /* !access */0, /* addr */0, 0, 0))
00432     dlite_main(regs.regs_PC - sizeof(md_inst_t), regs.regs_PC,
00433                sim_num_insn, &regs, mem);
00434 
00435   /* fast forward simulator loop, performs functional simulation for
00436      FASTFWD_COUNT insts, then turns on performance (timing) simulation */
00437   if (fastfwd_count > 0)
00438     {
00439       int icount;
00440 
00441       fprintf(stderr, "sim: ** fast forwarding %d insts **\n", fastfwd_count);
00442 
00443       fastfwding = TRUE;
00444       for (icount=0; icount < fastfwd_count; icount++)
00445         {
00446           /* maintain $r0 semantics */
00447           regs.regs_R[MD_REG_ZERO] = 0;
00448 #ifdef TARGET_ALPHA
00449           regs.regs_F.d[MD_REG_ZERO] = 0.0;
00450 #endif /* TARGET_ALPHA */
00451 
00452           /* get the next instruction to execute */
00453           MD_FETCH_INST(inst, mem, regs.regs_PC);
00454 
00455           /* set default reference address */
00456           addr = 0; is_write = FALSE;
00457 
00458           /* set default fault - none */
00459           fault = md_fault_none;
00460 
00461           /* decode the instruction */
00462           MD_SET_OPCODE(op, inst);
00463 
00464           /* execute the instruction */
00465           switch (op)
00466             {
00467 #define DEFINST(OP,MSK,NAME,OPFORM,RES,FLAGS,O1,O2,I1,I2,I3)            \
00468             case OP:                                                    \
00469               SYMCAT(OP,_IMPL);                                         \
00470               break;
00471 #define DEFLINK(OP,MSK,NAME,MASK,SHIFT)                                 \
00472             case OP:                                                    \
00473               panic("attempted to execute a linking opcode");
00474 #define CONNECT(OP)
00475 #undef DECLARE_FAULT
00476 #define DECLARE_FAULT(FAULT)                                            \
00477               { fault = (FAULT); break; }
00478 #include "machine.def"
00479             default:
00480               panic("attempted to execute a bogus opcode");
00481             }
00482 
00483           if (fault != md_fault_none)
00484             fatal("fault (%d) detected @ 0x%08p", fault, regs.regs_PC);
00485 
00486           /* update memory access stats */
00487           if (MD_OP_FLAGS(op) & F_MEM)
00488             {
00489               if (MD_OP_FLAGS(op) & F_STORE)
00490                 is_write = TRUE;
00491             }
00492 
00493           /* check for DLite debugger entry condition */
00494           if (dlite_check_break(regs.regs_NPC,
00495                                 is_write ? ACCESS_WRITE : ACCESS_READ,
00496                                 addr, sim_num_insn, sim_num_insn))
00497             dlite_main(regs.regs_PC, regs.regs_NPC, sim_num_insn, &regs, mem);
00498 
00499           /* go to the next instruction */
00500           regs.regs_PC = regs.regs_NPC;
00501           regs.regs_NPC += sizeof(md_inst_t);
00502         }
00503     }
00504   fastfwding = FALSE;
00505 
00506   if (trace_fd != NULL)
00507     {
00508       fprintf(stderr, "sim: writing EIO file initial checkpoint...\n");
00509       if (eio_write_chkpt(&regs, mem, trace_fd) != -1)
00510         panic("checkpoint code is broken");
00511     }
00512 
00513   fprintf(stderr, "sim: ** starting functional simulation **\n");
00514 
00515   /* set up initial default next PC */
00516   regs.regs_NPC = regs.regs_PC + sizeof(md_inst_t);
00517 
00518   while (TRUE)
00519     {
00520       /* maintain $r0 semantics */
00521       regs.regs_R[MD_REG_ZERO] = 0;
00522 #ifdef TARGET_ALPHA
00523       regs.regs_F.d[MD_REG_ZERO] = 0.0;
00524 #endif /* TARGET_ALPHA */
00525 
00526       /* check if checkpoint should be generated here... */
00527       if (chkpt_kind == one_shot_chkpt
00528           && !range_cmp_range1(&chkpt_range, regs.regs_NPC,
00529                                sim_num_insn, sim_num_insn))
00530         {
00531           myfprintf(stderr, "sim: writing checkpoint file `%s' @ inst %n...\n",
00532                   chkpt_fname, sim_num_insn);
00533 
00534           /* write the checkpoint file */
00535           eio_write_chkpt(&regs, mem, chkpt_fd);
00536 
00537           /* close the checkpoint file */
00538           eio_close(chkpt_fd);
00539 
00540           /* exit jumps to the target set in main() */
00541           longjmp(sim_exit_buf, /* exitcode + fudge */0+1);
00542         }
00543       else if (chkpt_kind == periodic_chkpt
00544                && sim_num_insn == next_chkpt_cycle)
00545         {
00546           char this_chkpt_fname[256];
00547 
00548           /* 'chkpt_fname' should be a printf format string */
00549           sprintf(this_chkpt_fname, chkpt_fname, chkpt_num);
00550           chkpt_fd = eio_create(this_chkpt_fname);
00551 
00552           myfprintf(stderr, "sim: writing checkpoint file `%s' @ inst %n...\n",
00553                   this_chkpt_fname, sim_num_insn);
00554 
00555           /* write the checkpoint file */
00556           eio_write_chkpt(&regs, mem, chkpt_fd);
00557 
00558           /* close the checkpoint file */
00559           eio_close(chkpt_fd);
00560 
00561           chkpt_num++;
00562           next_chkpt_cycle += per_chkpt_interval;
00563         }
00564 
00565       /* get the next instruction to execute */
00566       MD_FETCH_INST(inst, mem, regs.regs_PC);
00567 
00568       /* keep an instruction count */
00569       sim_num_insn++;
00570 
00571       /* set default reference address and access mode */
00572       addr = 0; is_write = FALSE;
00573 
00574       /* set default fault - none */
00575       fault = md_fault_none;
00576 
00577       /* decode the instruction */
00578       MD_SET_OPCODE(op, inst);
00579 
00580       /* execute the instruction */
00581       switch (op)
00582         {
00583 #define DEFINST(OP,MSK,NAME,OPFORM,RES,FLAGS,O1,O2,I1,I2,I3)            \
00584         case OP:                                                        \
00585           SYMCAT(OP,_IMPL);                                             \
00586           break;
00587 #define DEFLINK(OP,MSK,NAME,MASK,SHIFT)                                 \
00588         case OP:                                                        \
00589           panic("attempted to execute a linking opcode");
00590 #define CONNECT(OP)
00591 #define DECLARE_FAULT(FAULT)                                            \
00592           { fault = (FAULT); break; }
00593 #include "machine.def"
00594         default:
00595           panic("bogus opcode");
00596       }
00597 
00598       if (fault != md_fault_none)
00599         fatal("fault (%d) detected @ 0x%08p", fault, regs.regs_PC);
00600 
00601       if (MD_OP_FLAGS(op) & F_MEM)
00602         {
00603           sim_num_refs++;
00604           if (MD_OP_FLAGS(op) & F_STORE)
00605             is_write = TRUE;
00606         }
00607 
00608       /* check for DLite debugger entry condition */
00609       if (dlite_check_break(regs.regs_NPC,
00610                             is_write ? ACCESS_WRITE : ACCESS_READ,
00611                             addr, sim_num_insn, sim_num_insn))
00612         dlite_main(regs.regs_PC, regs.regs_NPC, sim_num_insn, &regs, mem);
00613 
00614       /* go to the next instruction */
00615       regs.regs_PC = regs.regs_NPC;
00616       regs.regs_NPC += sizeof(md_inst_t);
00617 
00618       /* finish early? */
00619       if (max_insts && sim_num_insn >= max_insts)
00620         return;
00621     }
00622 }

void sim_reg_options struct opt_odb_t   odb
 

Definition at line 141 of file sim-eio.c.

References chkpt_nelt, chkpt_opts, FALSE, fastfwd_count, max_insts, opt_reg_header(), opt_reg_int(), opt_reg_note(), opt_reg_string(), opt_reg_string_list(), opt_reg_uint(), per_chkpt_nelt, per_chkpt_opts, trace_fname, and TRUE.

00142 {
00143   opt_reg_header(odb, 
00144 "sim-eio: This simulator implements simulator support for generating\n"
00145 "external event traces (EIO traces) and checkpoint files.  External\n"
00146 "event traces capture one execution of a program, and allow it to be\n"
00147 "packaged into a single file for later re-execution.  EIO trace executions\n"
00148 "are 100% reproducible between subsequent executions (on the same platform.\n"
00149 "This simulator also provides functionality to generate checkpoints at\n"
00150 "arbitrary points within an external event trace (EIO) execution.  The\n"
00151 "checkpoint file (along with the EIO trace) can be used to start any\n"
00152 "SimpleScalar simulator in the middle of a program execution.\n"
00153                  );
00154 
00155   /* instruction limit */
00156   opt_reg_uint(odb, "-max:inst", "maximum number of inst's to execute",
00157                &max_insts, /* default */0,
00158                /* print */TRUE, /* format */NULL);
00159 
00160   opt_reg_int(odb, "-fastfwd", "number of insts skipped before tracing starts",
00161               &fastfwd_count, /* default */0,
00162               /* print */TRUE, /* format */NULL);
00163 
00164   opt_reg_string(odb, "-trace", "EIO trace file output file name",
00165                  &trace_fname, /* default */NULL,
00166                  /* print */TRUE, NULL);
00167 
00168   opt_reg_string_list(odb, "-perdump",
00169                       "periodic checkpoint every n instructions: "
00170                       "<base fname> <interval>",
00171                       per_chkpt_opts, /* sz */2, &per_chkpt_nelt,
00172                       /* default */NULL,
00173                       /* !print */FALSE, /* format */NULL, /* !accrue */FALSE);
00174 
00175   opt_reg_string_list(odb, "-dump",
00176                       "specify checkpoint file and trigger: <fname> <range>",
00177                       chkpt_opts, /* sz */2, &chkpt_nelt, /* default */NULL,
00178                       /* !print */FALSE, /* format */NULL, /* !accrue */FALSE);
00179 
00180   opt_reg_note(odb,
00181 "  Checkpoint range triggers are formatted as follows:\n"
00182 "\n"
00183 "    {{@|#}<start>}:{{@|#|+}<end>}\n"
00184 "\n"
00185 "  Both ends of the range are optional, if neither are specified, the range\n"
00186 "  triggers immediately.  Ranges that start with a `@' designate an address\n"
00187 "  range to trigger on, those that start with an `#' designate a cycle count\n"
00188 "  trigger.  All other ranges represent an instruction count range.  The\n"
00189 "  second argument, if specified with a `+', indicates a value relative\n"
00190 "  to the first argument, e.g., 1000:+100 == 1000:1100.\n"
00191 "\n"
00192 "    Examples:   -ptrace FOO.trc #0:#1000\n"
00193 "                -ptrace BAR.trc @2000:\n"
00194 "                -ptrace BLAH.trc :1500\n"
00195 "                -ptrace UXXE.trc :\n"
00196                );
00197 }

void sim_reg_stats struct stat_sdb_t   sdb
 

Definition at line 209 of file sim-eio.c.

References ld_reg_stats(), mem_reg_stats(), sim_num_refs, stat_reg_counter, stat_reg_formula(), and stat_reg_int().

00210 {
00211   stat_reg_counter(sdb, "sim_num_insn",
00212                    "total number of instructions executed",
00213                    &sim_num_insn, sim_num_insn, NULL);
00214   stat_reg_counter(sdb, "sim_num_refs",
00215                    "total number of loads and stores executed",
00216                    &sim_num_refs, 0, NULL);
00217   stat_reg_int(sdb, "sim_elapsed_time",
00218                "total simulation time in seconds",
00219                &sim_elapsed_time, 0, NULL);
00220   stat_reg_formula(sdb, "sim_inst_rate",
00221                    "simulation speed (in insts/sec)",
00222                    "sim_num_insn / sim_elapsed_time", NULL);
00223   ld_reg_stats(sdb);
00224   mem_reg_stats(mem, sdb);
00225 }

void sim_uninit void   
 

Definition at line 326 of file sim-eio.c.

References eio_close(), and trace_fd.

00327 {
00328   if (trace_fd != NULL)
00329     eio_close(trace_fd);
00330 }


Variable Documentation

FILE* chkpt_fd = NULL [static]
 

Definition at line 122 of file sim-eio.c.

Referenced by sim_load_prog(), and sim_main().

char* chkpt_fname [static]
 

Definition at line 121 of file sim-eio.c.

Referenced by sim_load_prog(), and sim_main().

enum { ... } chkpt_kind [static]
 

Referenced by sim_load_prog(), and sim_main().

int chkpt_nelt = 0 [static]
 

Definition at line 131 of file sim-eio.c.

Referenced by sim_load_prog(), and sim_reg_options().

unsigned int chkpt_num [static]
 

Definition at line 128 of file sim-eio.c.

Referenced by sim_load_prog(), and sim_main().

char* chkpt_opts[2] [static]
 

Definition at line 132 of file sim-eio.c.

Referenced by sim_load_prog(), and sim_reg_options().

struct range_range_t chkpt_range [static]
 

Definition at line 123 of file sim-eio.c.

int fastfwd_count [static]
 

Definition at line 110 of file sim-eio.c.

Referenced by sim_check_options(), sim_main(), and sim_reg_options().

int fastfwding = FALSE [static]
 

Definition at line 113 of file sim-eio.c.

Referenced by sim_main().

unsigned int max_insts [static]
 

Definition at line 107 of file sim-eio.c.

Referenced by sim_main(), and sim_reg_options().

struct mem_t* mem = NULL [static]
 

Definition at line 101 of file sim-eio.c.

counter_t next_chkpt_cycle [static]
 

Definition at line 127 of file sim-eio.c.

Referenced by sim_load_prog(), and sim_main().

counter_t per_chkpt_interval [static]
 

Definition at line 126 of file sim-eio.c.

Referenced by sim_load_prog(), and sim_main().

int per_chkpt_nelt = 0 [static]
 

Definition at line 135 of file sim-eio.c.

Referenced by sim_load_prog(), and sim_reg_options().

char* per_chkpt_opts[2] [static]
 

Definition at line 136 of file sim-eio.c.

Referenced by sim_load_prog(), and sim_reg_options().

struct regs_t regs [static]
 

Definition at line 98 of file sim-eio.c.

counter_t sim_num_refs = 0 [static]
 

Definition at line 104 of file sim-eio.c.

Referenced by sim_init(), sim_main(), and sim_reg_stats().

FILE* trace_fd = NULL [static]
 

Definition at line 117 of file sim-eio.c.

Referenced by sim_load_prog(), sim_main(), and sim_uninit().

char* trace_fname [static]
 

Definition at line 116 of file sim-eio.c.

Referenced by sim_load_prog(), and sim_reg_options().



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