Document Title

case OP:                                                        \
          SYMCAT(OP,_IMPL);                                             \
          break;

case OP:                                                        \
          panic("attempted to execute a linking opcode");

((STAT)->sc == sc_int                                                   \
   ? (counter_t)*((STAT)->variant.for_int.var)                          \
   : ((STAT)->sc == sc_uint                                             \
      ? (counter_t)*((STAT)->variant.for_uint.var)                      \
      : ((STAT)->sc == sc_counter                                       \
         ? *((STAT)->variant.for_counter.var)                           \
         : (panic("bad stat class"), 0))))

00263                 {
00264   seg_data,             /* data segment */
00265   seg_heap,             /* heap segment */
00266   seg_stack,            /* stack segment */
00267   seg_text,             /* text segment */
00268   seg_NUM
00269 };

00236                     {
00237   bc_uncond_dir,        /* direct unconditional branch */
00238   bc_cond_dir,          /* direct conditional branch */
00239   bc_call_dir,          /* direct functional call */
00240   bc_uncond_indir,      /* indirect unconditional branch */
00241   bc_cond_indir,        /* indirect conditional branch */
00242   bc_call_indir,        /* indirect function call */
00243   bc_NUM
00244 };

00204                   {
00205   ic_load,              /* load inst */
00206   ic_store,             /* store inst */
00207   ic_uncond,            /* uncond branch */
00208   ic_cond,              /* cond branch */
00209   ic_icomp,             /* all other integer computation */
00210   ic_fcomp,             /* all floating point computation */
00211   ic_trap,              /* system call */
00212   ic_NUM
00213 };

00285 {
00286   if (ld_data_base <= addr && addr < (ld_data_base + ld_data_size))
00287     return seg_data;
00288   else if ((ld_data_base + ld_data_size) <= addr && addr < ld_brk_point)
00289     return seg_heap;
00290   /* FIXME: ouch! */
00291   else if ((ld_stack_base - (16*1024*1024)) <= addr && addr < ld_stack_base)
00292     return seg_stack;
00293   else if (ld_text_base <= addr && addr < (ld_text_base + ld_text_size))
00294     return seg_text;
00295   else
00296     panic("cannot bind address to segment");
00297 }

00542 {
00543   /* just dump intermediate stats */
00544   sim_print_stats(stream);
00545 
00546   /* no error */
00547   return NULL;
00548 }

00567 {
00568   /* nothing currently */
00569 }

00188 {
00189   if (prof_all)
00190     {
00191       /* enable all options */
00192       prof_ic = TRUE;
00193       prof_inst = TRUE;
00194       prof_bc = TRUE;
00195       prof_am = TRUE;
00196       prof_seg = TRUE;
00197       prof_tsyms = TRUE;
00198       prof_dsyms = TRUE;
00199       prof_taddr = TRUE;
00200     }
00201 }

00525 {
00526   sim_num_refs = 0;
00527 
00528   /* allocate and initialize register file */
00529   regs_init(&regs);
00530 
00531   /* allocate and initialize memory space */
00532   mem = mem_create("mem");
00533   mem_init(mem);
00534 }

00555 {
00556   /* load program text and data, set up environment, memory, and regs */
00557   ld_load_prog(fname, argc, argv, envp, &regs, mem, TRUE);
00558 
00559   /* initialize the DLite debugger */
00560   dlite_init(md_reg_obj, dlite_mem_obj, profile_mstate_obj);
00561 }

00672 {
00673   int i;
00674   md_inst_t inst;
00675   register md_addr_t addr;
00676   register int is_write;
00677   enum md_opcode op;
00678   unsigned int flags;
00679   enum md_fault_type fault;
00680 
00681   fprintf(stderr, "sim: ** starting functional simulation **\n");
00682 
00683   /* set up initial default next PC */
00684   regs.regs_NPC = regs.regs_PC + sizeof(md_inst_t);
00685 
00686   /* check for DLite debugger entry condition */
00687   if (dlite_check_break(regs.regs_PC, /* no access */0, /* addr */0, 0, 0))
00688     dlite_main(regs.regs_PC - sizeof(md_inst_t), regs.regs_PC,
00689                sim_num_insn, &regs, mem);
00690 
00691   while (TRUE)
00692     {
00693       /* maintain $r0 semantics */
00694       regs.regs_R[MD_REG_ZERO] = 0;
00695 #ifdef TARGET_ALPHA
00696       regs.regs_F.d[MD_REG_ZERO] = 0.0;
00697 #endif /* TARGET_ALPHA */
00698 
00699       /* get the next instruction to execute */
00700       MD_FETCH_INST(inst, mem, regs.regs_PC);
00701 
00702       if (verbose)
00703         {
00704           myfprintf(stderr, "%10n @ 0x%08p: ", sim_num_insn, regs.regs_PC);
00705           md_print_insn(inst, regs.regs_PC, stderr);
00706           fprintf(stderr, "\n");
00707           /* fflush(stderr); */
00708         }
00709 
00710       /* keep an instruction count */
00711       sim_num_insn++;
00712 
00713       /* set default reference address and access mode */
00714       addr = 0; is_write = FALSE;
00715 
00716       /* set default fault - none */
00717       fault = md_fault_none;
00718 
00719       /* decode the instruction */
00720       MD_SET_OPCODE(op, inst);
00721 
00722       /* execute the instruction */
00723       switch (op)
00724         {
00725 #define DEFINST(OP,MSK,NAME,OPFORM,RES,FLAGS,O1,O2,I1,I2,I3)            \
00726         case OP:                                                        \
00727           SYMCAT(OP,_IMPL);                                             \
00728           break;
00729 #define DEFLINK(OP,MSK,NAME,MASK,SHIFT)                                 \
00730         case OP:                                                        \
00731           panic("attempted to execute a linking opcode");
00732 #define CONNECT(OP)
00733 #define DECLARE_FAULT(FAULT)                                            \
00734           { fault = (FAULT); break; }
00735 #include "machine.def"
00736         default:
00737           panic("attempted to execute a bogus opcode");
00738       }
00739 
00740       if (MD_OP_FLAGS(op) & F_MEM)
00741         {
00742           sim_num_refs++;
00743           if (MD_OP_FLAGS(op) & F_STORE)
00744             is_write = TRUE;
00745         }
00746 
00747       /*
00748        * profile this instruction
00749        */
00750       flags = MD_OP_FLAGS(op);
00751 
00752       if (prof_ic)
00753         {
00754           enum inst_class_t ic;
00755 
00756           /* compute instruction class */
00757           if (flags & F_LOAD)
00758             ic = ic_load;
00759           else if (flags & F_STORE)
00760             ic = ic_store;
00761           else if (flags & F_UNCOND)
00762             ic = ic_uncond;
00763           else if (flags & F_COND)
00764             ic = ic_cond;      
00765           else if (flags & F_ICOMP)
00766             ic = ic_icomp;
00767           else if (flags & F_FCOMP)
00768             ic = ic_fcomp;
00769           else if (flags & F_TRAP)
00770             ic = ic_trap;
00771           else
00772             panic("instruction has no class");
00773 
00774           /* update instruction class profile */
00775           stat_add_sample(ic_prof, (int)ic);
00776         }
00777 
00778       if (prof_inst)
00779         {
00780           /* update instruction profile */
00781           stat_add_sample(inst_prof, (int)op - /* skip NA */1);
00782         }
00783 
00784       if (prof_bc)
00785         {
00786           enum branch_class_t bc;
00787 
00788           /* compute instruction class */
00789           if (flags & F_CTRL)
00790             {
00791               if ((flags & (F_CALL|F_DIRJMP)) == (F_CALL|F_DIRJMP))
00792                 bc = bc_call_dir;
00793               else if ((flags & (F_CALL|F_INDIRJMP)) == (F_CALL|F_INDIRJMP))
00794                 bc = bc_call_indir;
00795               else if ((flags & (F_UNCOND|F_DIRJMP)) == (F_UNCOND|F_DIRJMP))
00796                 bc = bc_uncond_dir;
00797               else if ((flags & (F_UNCOND|F_INDIRJMP))== (F_UNCOND|F_INDIRJMP))
00798                 bc = bc_uncond_indir;
00799               else if ((flags & (F_COND|F_DIRJMP)) == (F_COND|F_DIRJMP))
00800                 bc = bc_cond_dir;
00801               else if ((flags & (F_COND|F_INDIRJMP)) == (F_COND|F_INDIRJMP))
00802                 bc = bc_cond_indir;
00803               else
00804                 panic("branch has no class");
00805 
00806               /* update instruction class profile */
00807               stat_add_sample(bc_prof, (int)bc);
00808             }
00809         }
00810 
00811       if (prof_am)
00812         {
00813           enum md_amode_type am;
00814 
00815           /* update addressing mode pre-probe FSM */
00816           MD_AMODE_PREPROBE(op, fsm);
00817 
00818           /* compute addressing mode */
00819           if (flags & F_MEM)
00820             {
00821               /* compute addressing mode */
00822               MD_AMODE_PROBE(am, op, fsm);
00823 
00824               /* update the addressing mode profile */
00825               stat_add_sample(am_prof, (int)am);
00826 
00827               /* addressing mode pre-probe FSM, after all loads and stores */
00828               MD_AMODE_POSTPROBE(fsm);
00829             }
00830         }
00831 
00832       if (prof_seg)
00833         {
00834           if (flags & F_MEM)
00835             {
00836               /* update instruction profile */
00837               stat_add_sample(seg_prof, (int)bind_to_seg(addr));
00838             }
00839         }
00840 
00841       if (prof_tsyms)
00842         {
00843           int tindex;
00844 
00845           /* attempt to bind inst address to a text segment symbol */
00846           sym_bind_addr(regs.regs_PC, &tindex, /* !exact */FALSE, sdb_text);
00847 
00848           if (tindex >= 0)
00849             {
00850               if (tindex > sym_ntextsyms)
00851                 panic("bogus text symbol index");
00852 
00853               stat_add_sample(tsym_prof, tindex);
00854             }
00855           /* else, could not bind to a symbol */
00856         }
00857 
00858       if (prof_dsyms)
00859         {
00860           int dindex;
00861 
00862           if (flags & F_MEM)
00863             {
00864               /* attempt to bind inst address to a text segment symbol */
00865               sym_bind_addr(addr, &dindex, /* !exact */FALSE, sdb_data);
00866 
00867               if (dindex >= 0)
00868                 {
00869                   if (dindex > sym_ndatasyms)
00870                     panic("bogus data symbol index");
00871 
00872                   stat_add_sample(dsym_prof, dindex);
00873                 }
00874               /* else, could not bind to a symbol */
00875             }
00876         }
00877 
00878       if (prof_taddr)
00879         {
00880           /* add regs_PC exec event to text address profile */
00881           stat_add_sample(taddr_prof, regs.regs_PC);
00882         }
00883 
00884       /* update any stats tracked by PC */
00885       for (i=0; i<pcstat_nelt; i++)
00886         {
00887           counter_t newval;
00888           int delta;
00889 
00890           /* check if any tracked stats changed */
00891           newval = STATVAL(pcstat_stats[i]);
00892           delta = newval - pcstat_lastvals[i];
00893           if (delta != 0)
00894             {
00895               stat_add_samples(pcstat_sdists[i], regs.regs_PC, delta);
00896               pcstat_lastvals[i] = newval;
00897             }
00898 
00899         }
00900 
00901       /* check for DLite debugger entry condition */
00902       if (dlite_check_break(regs.regs_NPC,
00903                             is_write ? ACCESS_WRITE : ACCESS_READ,
00904                             addr, sim_num_insn, sim_num_insn))
00905         dlite_main(regs.regs_PC, regs.regs_NPC, sim_num_insn, &regs, mem);
00906 
00907       /* go to the next instruction */
00908       regs.regs_PC = regs.regs_NPC;
00909       regs.regs_NPC += sizeof(md_inst_t);
00910 
00911       /* finish early? */
00912       if (max_insts && sim_num_insn >= max_insts)
00913         return;
00914     }
00915 }

00136 {
00137   opt_reg_header(odb, 
00138 "sim-profile: This simulator implements a functional simulator with\n"
00139 "profiling support.  Run with the `-h' flag to see profiling options\n"
00140 "available.\n"
00141                  );
00142 
00143   /* instruction limit */
00144   opt_reg_uint(odb, "-max:inst", "maximum number of inst's to execute",
00145                &max_insts, /* default */0,
00146                /* print */TRUE, /* format */NULL);
00147 
00148   opt_reg_flag(odb, "-all", "enable all profile options",
00149                &prof_all, /* default */FALSE, /* print */TRUE, NULL);
00150 
00151   opt_reg_flag(odb, "-iclass", "enable instruction class profiling",
00152                &prof_ic, /* default */FALSE, /* print */TRUE, NULL);
00153 
00154   opt_reg_flag(odb, "-iprof", "enable instruction profiling",
00155                &prof_inst, /* default */FALSE, /* print */TRUE, NULL);
00156 
00157   opt_reg_flag(odb, "-brprof", "enable branch instruction profiling",
00158                &prof_bc, /* default */FALSE, /* print */TRUE, NULL);
00159 
00160   opt_reg_flag(odb, "-amprof", "enable address mode profiling",
00161                &prof_am, /* default */FALSE, /* print */TRUE, NULL);
00162 
00163   opt_reg_flag(odb, "-segprof", "enable load/store address segment profiling",
00164                &prof_seg, /* default */FALSE, /* print */TRUE, NULL);
00165 
00166   opt_reg_flag(odb, "-tsymprof", "enable text symbol profiling",
00167                &prof_tsyms, /* default */FALSE, /* print */TRUE, NULL);
00168 
00169   opt_reg_flag(odb, "-taddrprof", "enable text address profiling",
00170                &prof_taddr, /* default */FALSE, /* print */TRUE, NULL);
00171 
00172   opt_reg_flag(odb, "-dsymprof", "enable data symbol profiling",
00173                &prof_dsyms, /* default */FALSE, /* print */TRUE, NULL);
00174 
00175   opt_reg_flag(odb, "-internal",
00176                "include compiler-internal symbols during symbol profiling",
00177                &load_locals, /* default */FALSE, /* print */TRUE, NULL);
00178 
00179   opt_reg_string_list(odb, "-pcstat",
00180                       "profile stat(s) against text addr's (mult uses ok)",
00181                       pcstat_vars, MAX_PCSTAT_VARS, &pcstat_nelt, NULL,
00182                       /* !print */FALSE, /* format */NULL, /* accrue */TRUE);
00183 }

00328 {
00329   int i;
00330 
00331   stat_reg_counter(sdb, "sim_num_insn",
00332                    "total number of instructions executed",
00333                    &sim_num_insn, sim_num_insn, NULL);
00334   stat_reg_counter(sdb, "sim_num_refs",
00335                    "total number of loads and stores executed",
00336                    &sim_num_refs, 0, NULL);
00337   stat_reg_int(sdb, "sim_elapsed_time",
00338                "total simulation time in seconds",
00339                &sim_elapsed_time, 0, NULL);
00340   stat_reg_formula(sdb, "sim_inst_rate",
00341                    "simulation speed (in insts/sec)",
00342                    "sim_num_insn / sim_elapsed_time", NULL);
00343 
00344   if (prof_ic)
00345     {
00346       /* instruction class profile */
00347       ic_prof = stat_reg_dist(sdb, "sim_inst_class_prof",
00348                               "instruction class profile",
00349                               /* initial value */0,
00350                               /* array size */ic_NUM,
00351                               /* bucket size */1,
00352                               /* print format */(PF_COUNT|PF_PDF),
00353                               /* format */NULL,
00354                               /* index map */inst_class_str,
00355                               /* print fn */NULL);
00356     }
00357 
00358   if (prof_inst)
00359     {
00360       int i;
00361       char buf[512];
00362 
00363       /* conjure up appropriate instruction description strings */
00364       for (i=0; i < /* skip NA */OP_MAX-1; i++)
00365         {
00366           sprintf(buf, "%-8s %-6s", md_op2name[i+1], md_op2format[i+1]);
00367           inst_str[i] = mystrdup(buf);
00368         }
00369       
00370       /* instruction profile */
00371       inst_prof = stat_reg_dist(sdb, "sim_inst_prof",
00372                                 "instruction profile",
00373                                 /* initial value */0,
00374                                 /* array size */ /* skip NA */OP_MAX-1,
00375                                 /* bucket size */1,
00376                                 /* print format */(PF_COUNT|PF_PDF),
00377                                 /* format */NULL,
00378                                 /* index map */inst_str,
00379                                 /* print fn */NULL);
00380     }
00381 
00382   if (prof_bc)
00383     {
00384       /* instruction branch profile */
00385       bc_prof = stat_reg_dist(sdb, "sim_branch_prof",
00386                               "branch instruction profile",
00387                               /* initial value */0,
00388                               /* array size */bc_NUM,
00389                               /* bucket size */1,
00390                               /* print format */(PF_COUNT|PF_PDF),
00391                               /* format */NULL,
00392                               /* index map */branch_class_str,
00393                               /* print fn */NULL);
00394     }
00395 
00396   if (prof_am)
00397     {
00398       /* instruction branch profile */
00399       am_prof = stat_reg_dist(sdb, "sim_addr_mode_prof",
00400                               "addressing mode profile",
00401                               /* initial value */0,
00402                               /* array size */md_amode_NUM,
00403                               /* bucket size */1,
00404                               /* print format */(PF_COUNT|PF_PDF),
00405                               /* format */NULL,
00406                               /* index map */md_amode_str,
00407                               /* print fn */NULL);
00408     }
00409 
00410   if (prof_seg)
00411     {
00412       /* instruction branch profile */
00413       seg_prof = stat_reg_dist(sdb, "sim_addr_seg_prof",
00414                                "load/store address segment profile",
00415                                /* initial value */0,
00416                                /* array size */seg_NUM,
00417                                /* bucket size */1,
00418                                /* print format */(PF_COUNT|PF_PDF),
00419                                /* format */NULL,
00420                                /* index map */addr_seg_str,
00421                                /* print fn */NULL);
00422     }
00423 
00424   if (prof_tsyms && sym_ntextsyms != 0)
00425     {
00426       int i;
00427 
00428       /* load program symbols */
00429       sym_loadsyms(ld_prog_fname, load_locals);
00430 
00431       /* conjure up appropriate instruction description strings */
00432       tsym_names = (char **)calloc(sym_ntextsyms, sizeof(char *));
00433 
00434       for (i=0; i < sym_ntextsyms; i++)
00435         tsym_names[i] = sym_textsyms[i]->name;
00436       
00437       /* text symbol profile */
00438       tsym_prof = stat_reg_dist(sdb, "sim_text_sym_prof",
00439                                 "text symbol profile",
00440                                 /* initial value */0,
00441                                 /* array size */sym_ntextsyms,
00442                                 /* bucket size */1,
00443                                 /* print format */(PF_COUNT|PF_PDF),
00444                                 /* format */NULL,
00445                                 /* index map */tsym_names,
00446                                 /* print fn */NULL);
00447     }
00448 
00449   if (prof_dsyms && sym_ndatasyms != 0)
00450     {
00451       int i;
00452 
00453       /* load program symbols */
00454       sym_loadsyms(ld_prog_fname, load_locals);
00455 
00456       /* conjure up appropriate instruction description strings */
00457       dsym_names = (char **)calloc(sym_ndatasyms, sizeof(char *));
00458 
00459       for (i=0; i < sym_ndatasyms; i++)
00460         dsym_names[i] = sym_datasyms[i]->name;
00461       
00462       /* data symbol profile */
00463       dsym_prof = stat_reg_dist(sdb, "sim_data_sym_prof",
00464                                 "data symbol profile",
00465                                 /* initial value */0,
00466                                 /* array size */sym_ndatasyms,
00467                                 /* bucket size */1,
00468                                 /* print format */(PF_COUNT|PF_PDF),
00469                                 /* format */NULL,
00470                                 /* index map */dsym_names,
00471                                 /* print fn */NULL);
00472     }
00473 
00474   if (prof_taddr)
00475     {
00476       /* text address profile (sparse profile), NOTE: a dense print format
00477          is used, its more difficult to read, but the profiles are *much*
00478          smaller, I've assumed that the profiles are read by programs, at
00479          least for your sake I hope this is the case!! */
00480       taddr_prof = stat_reg_sdist(sdb, "sim_text_addr_prof",
00481                                   "text address profile",
00482                                   /* initial value */0,
00483                                   /* print format */(PF_COUNT|PF_PDF),
00484                                   /* format */"0x%p %u %.2f",
00485                                   /* print fn */NULL);
00486     }
00487 
00488   for (i=0; i<pcstat_nelt; i++)
00489     {
00490       char buf[512], buf1[512];
00491       struct stat_stat_t *stat;
00492 
00493       /* track the named statistical variable by text address */
00494 
00495       /* find it... */
00496       stat = stat_find_stat(sdb, pcstat_vars[i]);
00497       if (!stat)
00498         fatal("cannot locate any statistic named `%s'", pcstat_vars[i]);
00499 
00500       /* stat must be an integral type */
00501       if (stat->sc != sc_int && stat->sc != sc_uint && stat->sc != sc_counter)
00502         fatal("`-pcstat' statistical variable `%s' is not an integral type",
00503               stat->name);
00504 
00505       /* register this stat */
00506       pcstat_stats[i] = stat;
00507       pcstat_lastvals[i] = STATVAL(stat);
00508 
00509       /* declare the sparce text distribution */
00510       sprintf(buf, "%s_by_pc", stat->name);
00511       sprintf(buf1, "%s (by text address)", stat->desc);
00512       pcstat_sdists[i] = stat_reg_sdist(sdb, buf, buf1,
00513                                         /* initial value */0,
00514                                         /* print format */(PF_COUNT|PF_PDF),
00515                                         /* format */"0x%p %u %.2f",
00516                                         /* print fn */NULL);
00517     }
00518   ld_reg_stats(sdb);
00519   mem_reg_stats(mem, sdb);
00520 }

00580 {
00581   /* nada */
00582 }

 {
  "data segment",       
  "heap segment",       
  "stack segment",      
  "text segment",       
}

 {
  "uncond direct",      
  "cond direct",        
  "call direct",        
  "uncond indirect",    
  "cond indirect",      
  "call indirect"       
}

 {
  "load",               
  "store",              
  "uncond branch",      
  "cond branch",        
  "int computation",    
  "fp computation",     
  "trap"                
}

sim-profile.c File Reference

Defines

Enumerations

Functions

Variables

Define Documentation

Enumeration Type Documentation

Function Documentation

Variable Documentation


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