Consider the following C code:

int a[4] = {1, 2, 3, 4};
int *b[4] = {NULL, NULL, NULL, NULL};
int **pp1 = &b[1];
pp1[0] = &a[1];
int *pp2 = b[1];
*pp1[0] = 2;

After the above statements, which of the following are likely to access out of bounds memory? Select all that apply.

Consider the following Makefile:

all: a b c d

a: e f g
    buildA

b: e d
    buildB

c: e g
    buildC

d: a c
    buildD

(assume there are tab characters before the buildX lines).

Which of the following are true? Select all that apply.

Consider a program that counts the number of lines of text the files in the current directory have. The program works by:

1. obtain a list of the names of files in the current directory;
2. running a loop for each such file:
   1. open the file;
   2. if opening the file is successful:
      1. read the entire contents of the file;
      2. count the number of newlines in what was read;
      3. print the filename and number of newlines found, flushing the output immediately;
      4. close the file
3. then, sum up the number of newlines found in all files
4. and print the sum

Based on the operations above, if this program were run on a directory with 1 file, we would expect system calls to be made for which (if any) of the steps above? Select all that apply.

Consider the following C code that uses the POSIX (Unix) API:

pid_t p, q, r;
p = fork();
if (p > 0) {
    q = fork();
    r = fork();
    if (q > 0) {
        exit(1);
    } else {
        exit(2);
    }
} else {
    exit(3);
}

If we start running the above code in exactly one process, some new processes will end up executing parts of the above code because of the calls to fork(). In that situation, what is the maximum number of processes that could be executing some part of the above code simulatenously? Include the original process in your count.

Consider the following C code that uses the POSIX (Unix) API:

pid_t p;
p = fork();
if (p == 0) {
    int y = 0;
    while (y < 100000) {
        y += 1;
    }
    exit(0);
} else {
    printf("HERE\n");
}

Assume that fork does not fail.

If this is run on a single-core system, then just before printf("HERE\n") makes a system call to output to the screen, the value of local variable y in the code above may be stored ___. Select all that apply.

Consider the following C code that uses the POSIX (Unix) API:

pid_t p, q;
p = fork();
if (p > 0) {
    q = fork();
    if (q > 0) {
        /* place 1 */
        printf("A"); fflush(stdout);
        exit(1);
    } else {
        /* place 2 */
        printf("B"); fflush(stdout);
        exit(2);
    }
} else {
    /* place 3 */
    printf("C"); fflush(stdout);
    exit(3);
}

Assume that fork does not fail.

Currently, the program can output A, B, and C in any order. Which of the following would restrict the order in which they can be output? Select all that apply.

Note that when waitpid is called and there is no child process of the current process to wait for, it returns an error immediately.

Consider the following page table:

Suppose this is used on a system with 1024-byte pages. On that system, what is a virtual address that corresponds to the physical address (written in binary) 00111 10000 01101? Write your answer as a binary number. If there is no such address, write "impossible".

Suppose we have a three-level page table structure with 8192-byte pages (implying 13-bit page offsets) and page tables (at each level) with 1024 entries, each of which takes up 8 bytes.

Since the page tables have 1024 entries, 10 bits from the virtual page number are used to form the index to the page tables at each level.

Suppose the page table base register is set to physical address 0x1000000.

As part of looking up the virtual address 0xABCDEF000 with the page table base register, the processor may retrieve a first-level page table entry from physical address ____.

Write your answer as a hexadecimal number. If there is not enough information given, write "unknown" and explain briefly in the comments.

Consider a virtual memory system with:

• 16 bit virtual addresses
• 20 bit physical addresses
• 4096 byte pages; and
• single-level page tables

If one wanted to modify this system to support 20 bit virtual addresses without changing the size of pages or physical page numbers, then the number of entries in the resulting page table would be _____ (instead of 16 now).

If it is not possible to increase the virtual address size this way while not changing the size of pages or physical addresses, write "impossible". If not enough information is given, write "unknown" and explain in the comments.

Consider a 65536 byte 4-way set associative cache with 64-byte blocks and a random replacement policy running on a system with 64-bit addresses. How many bits in total does this cache use to store valid bits and tag bits? (Count the bits used over all the sets of the cache, not just the bits used for one block or set.)

Consider the following code. You may assume a main() calls pthread_create for ThreadA and ThreadB and joins them:

pthread_mutex_t lock1 = PTHREAD_MUTEX_INITIALIZER;
pthread_mutex_t lock2 = PTHREAD_MUTEX_INITIALIZER;
string one = "init one", two = "init two";

void ThreadA() {
    pthread_mutex_lock(&lock1);
    one = "A1";
    pthread_mutex_unlock(&lock1);
    pthread_mutex_lock(&lock2);
    two = "A2";
    pthread_mutex_unlock(&lock2);
}

void ThreadB() {
    pthread_mutex_lock(&lock2);
    two = "B2";
    pthread_mutex_unlock(&lock2);
    pthread_mutex_lock(&lock1);
    one = "B1";
    pthread_mutex_unlock(&lock1);
}

Which of the following are possible final values for "one" and "two", respectively?

Suppose our network uses acknowledgments and sequence numbers like described in lecture to send data from machine A to machine B over a network that follows the mailbox model.

In this scheme, machine A does not send a data message until after it receives an acknowledgment message for its previous data message, so that it can handle cases where the network fails to deliver its data.

Suppose while a particular data transfer occurs, the network is 99.9% reliable for sending messages from A to B, but only 33.3% reliable for messages from B to A. For this purposes of this problem, assume that this packet loss follows a regular pattern:

• every 1000th message from A to B is lost (starting with the 1000th message sent); and
• every third message from B to A is lost (starting with the 3rd message sent).

(Note: actual packet loss is stochastic – not actually every Nth packet, as we will assume for the purposes of this problem.)

If the data transfer sends data from A to B that is split across 3000 data messages, how many messages, including lost data and acknowledgment messages, will be sent across the network in total? (Include messages that are sent but lost in your count.)

Suppose we want to transform code like:

value = ReadNext();
while (value == 1) {
    value = ReadNext();
}
Process(value);
value = ReadNext();
Process(value);
while (true) {
    ReadNext(); // ignore remaining values
}

into a callback-based programming model. In this model, instead of being able to call ReadNext() function, a "main loop" calls a Recieved() function (similar to the networking lab).

Consider the following incomplete implementation of such a Received() function:

static int count = 0;
void Received(int value) {
    if (__________ /* BLANK 1 */) {
        ______________ /* BLANK 2 */
        Process(value);
        count += 1;
    }
}

To do closest to the same thing as the original code, which of the following would be most appropriate to place in the blanks marked BLANK 1 and BLANK 2, respectively?

Suppose the virginia.edu domain name server is compromised. Which of the following vulnerabilities does this create? Select all that apply.

Suppose a router using network address translation has the following table in place:

    remote address:port     public IP port    private IP address           private IP port
    128.165.17.3:443         23423              192.168.1.7                 55938
    128.155.148.7:443        23424              192.168.1.8                 61243
    128.155.148.7:443        23425              192.168.1.9                 61839

Assume this is on a router with an IP address of 1.2.3.4 on the public network and 192.168.1.1 on a private network. Network address translation allows all the machines on the private network to share the router's public IP address.

Based on the above table, if a packet comes in from the public network with a source address of 128.155.148.7, source port of 443, and destination address of 1.2.3.4, and destination port of 23424, the router should send on the private network ...

Consider a TLS handshake like the one we described in lecture. Suppose a client is trying to contact a server foo.example.com but instead reaches a machine in the middle attacker.

Assume the intended server’s private key has not been compromised, and that the certificate authorities trusted by the client have only signed certificates for foo.example.com that include the server's intended public key.

Which, if any, of the following could happen (depending on what the machine-in-the-middle does)? Select all that apply.

Suppose a 5-stage pipelined processor, similar to the design discussed in lecture, executes a program with 100 million instructions. If there were no hazards, this program would execute in about 100 million cycles.

Suppose that we do not have forwarding (also known as bypassing) from the memory stage to the execute stage. 30% of the program's instructions use the data cache, either loading a value of from data cache or storing a value. Of the those data cache using instructions, 70% are loads. 10% of those loads are followed by an instruction that has a data dependency on the load.

Assuming no cache misses, we’d expect the program to execute around __% slower than the ideal 100 million cycle case.

Suppose an out-of-order processor has two execution units for arithmetic, each pipelined with two stages. All arithmetic instructions use both stages.

How many cycles minimum would this processor need to do the arithmetic for the following assembly snippet? (Don't include time needed for instruction fetch, register renaming, etc., ie cycle 1 is when the first instruction starts its first execute stage, and your answer is the cycle when the last instruction finishes its last execute stage)

imulq %r8, %r12
imulq %r8, %r10
imulq %r12, %r8
imulq %r9, %r8
imulq %r10, %r14
imulq %r10, %r15

Consider the following C code:

array1[mystery * 512] += array2[mystery * 64];

Suppose array1 is an array of 1 million chars located at address 0x4000000, and array2 is an array of 1 million chars located at address 0x5001000 and we have a system with a 65536-byte direct-mapped cache with 64-byte blocks which does not use virtual memory.

When running the above code we discover that something from cache sets 313 and from cache set 968 are evicted. What is a possible value of mystery? Assume all accesses to array1 and array2 are in bounds for the arrays.