testable material not IEEE floats 1: there are bits (for data and code) where things go in memory amdahl's law parallelism v concurrency S16 #5 endianness (F15 #23) CC HDLs - we didn't say much they are not sequential (everything happens at once in parallel) HCL2D is one wiring ops we mostly test this in homework you should be able to read wiring you should also be able to say "the input to mem address comes from"... struct vs typedef struct, scope of names in C typedef ... newname; then newname exists AFTER that statement. typedef struct { /* foo is not defined here */ } foo; struct whatever { ... }; // the name of the struct is "struct whatever" struct baz { struct baz* next; }; // creates a struct baz type typedef struct baz { struct baz* next; } bazzle; // creates a struct baz type and a bazzle type, which are the same type (two names) typedef struct baz bazzle; strings, points, arrays, decaying points, ... int a[24]; // the type of a is a 24-element array of int (4*24 = 96-byte value) int *b; // the type of b is a pointer to one or more int values b = &(a[0]); // b points to a -- that is the first element of a b = a; // the same thing as the previous line "hi"; // a const char * to an array containing {'h', 'i', '\0'} a[3] = 3; // sets the 4th value of a to 3 b[3] = 3; // sets the 4th value of a to 3 bit tricks operators in table grading HW - each puzzle = points; score = (points you got) / (total available) F15 #17 - bitwise list types S16 #2,3 - lists [RC]ISC RISC: fewer instr, addressing modes, simpler instructions, more registers fixed-length instr CISC: more instr, addressing modes more complicated instructions fewer registers fewer instructions per task variable-width instr