S2016 final Q9-10 - memory for lists

bubble vs stall
pipeline delays from registers, timing
last exam stage division
filling in B/N/S boxes

register renaming
	if instructions can finish out of order
		then code register names are not sufficient
		so we make up new names
	
	code						execute
	irmovq $23, %rax    		irmovq $55, %rax_2
	irmovq $55, %rax			irmovq $23, %rax_1
	

handlers
exception types

Last question in last quiz - TLB+L1
allocating VM pages
vm_area_struct