CS 3330: Schedule

This page does not represent the most current semester of this course; it is present merely as an archive.

This schedule is approximate. We will likely spend extra time on a topic here or there and do others more rapidly than expected, adjusting the schedule as we go.

All sectons marked with the section symbol § are in the textbook Computer Systems: a Programmer’s Perspective, third edition. You should read the sections indicated before class of that day they are listed on the schedule.

We will not change the dates of exams without at least 2 weeks notice.

All lecture notes for all dates can be accessed on this site.

Overview §1
LT Drawings + Video

Setup Installing C, etc., etc.. Do on your own (Olsson 001 will not be staffed)

C §1
CR Slides
tips on rm, requested by a student during lecture

More C CR Slides + Audio

Debugger exercise described here

Binary Operators (skim §2 for parts you don’t remember)
LT Drawings + Video

add deadline Assembly (Figures 3.1, 3.2, and 3.3; §3.6.7, 3.7; more from §3 if you need the review )
LT Drawings + Video

strlen and strsep Coding labs writeup

ISA’s and Y86-64 §4.1
CR Slides + Audio

SEQ part 1 §4.2, §4.3.1; also some about registers; see 2330 lite if you haven’t had CS/ECE 2330
CR Slides + Audio

lists in C Coding labs writeup

SEQ part 2 §4.3.2–§4.3.4
CR Slides + Audio

HDLs and HCL §4.2.2–4.2.4; HCL2D sections 2 and 3
LT Drawings + Video + Code

Bomb HW due at Noon bit puzzles Bit puzzle writeup and coding interface

HCL2D (including debugging) Bit HW released
LT Drawings + Video + Code

Review LT Drawings, Text, + Video

bit puzzles due at Noon
(via the coding interface)
Review (optional) TA-run review sessions
See the old exams

Exam §1; topics in C and from §2–3 discussed in class or lab; §4–4.3.4. Details of HLC2D are not on this exam.

Reading Day

HCL2D lab writeup

Pipelining HCL2-irmovq released
§4.4
CR Slides + Video

drop deadline PIPE §4.5-4.5.4
CR Slides + Video

HCL2-irmovq due at Noon SEQ lab writeup

PIPE Hazards HCL4-seq released
§4.5.5, 4.5.8
LT Drawings + Video

withdraw deadline Pipelined Processors §4.5.10–4.6, 5.7–5.7.2
LT Drawings + Video

HCL4-seq due at Noon PIPE1 lab writeup

Pipe Debugging in HCL; Caching HCL6-halfpipe released
skim §6.1.1; read §6.2–6.3
LT Drawings + Video

Caching §6.4
CR Slides + Video

HCL6-halfpipe due at Noon PIPE2 lab writeup

Cache Performance HCL8-fullpipe released
§6.5
CR Slides + Video

Review LT Text + Drawings + Video

HCL8-fullpipe due at Noon Review

Exam §4;, §5.7–5.7.2, §6–6.5; deep understanding of 5-stage pipeline implementation

Performance §5.1–5.2, 5.4–5.6, 5.8–5.11; skim §5.14
LT Drawings + Video

Perf1 matrix rotation task

Performance §5.1–5.2, 5.4–5.6, 5.8–5.11; skim §5.14
LT Drawings + Video

Exceptions Figure 6.11; §8.1–8.3
CR: Slides + Video

rotate due at Noon Perf2 image smoothing task

Exceptions §8.5–8.5.1; Figure 8.6
CR: Slides + Video

Virtual memory §9–9.3.2, 9.6.3
LT Drawings + Video

Thanksgiving Recess

Thanksgiving Recess

Virtual memory §9.3–9.5
LT Drawings + Video

smooth due at Noon Memory lab writeup

Virtual memory memory hw released
§9.6–9.6.2, 9.6.4; skim §9.7
LT Drawings + Video

memory hw due at 23:59 Review §1–9
LT Drawings + Video

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Final Exam Tue 13 Dec 7pm
NAU 101

Final exam makeups conflict form

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Tuesday Lab Thursday
Copyright © 2016 by Luther Tychonievich and Charles Reiss. All rights reserved.
Last updated 2016-12-06 14:23:27