Re: Cray 2

From: Charles Grassl (cmg@ferrari.cray.com)
Date: Fri Feb 17 1995 - 11:06:47 CST


John;

Amazing that you inquire about the CRAY-2 this day. Our data center's
CRAY-2 was powered off at 0200 this morning.

I recall that when production stopped in 1989, we committed to full
software support and development until 1995. By develeopment, we meant
that compiler and UNICOS improvements would be applied to the CRAY-2.

Thirty CRAY-2 systems were built from 1984 through 1989. At the
beginning of 1994, only one (to my knowledge) CRAY-2 had been
decommissioned. Now there are quite a few more. "Lunch room"
conversation indicates that half of the CRAY-2's might not be running
any longer.

The "burst" bandwidth of a single CRAY-2 CPU is 240 MHz * 8 bytes, or
1920 Mbyte/s. I recall that the speed of a dot product was 100
Mflop/s, so it get a sustained bandwidth of 1600 Mbyte/s.

The CRAY-2 systems have many variations in memory speeds.
Approximately one third of all systems sold used SRAM, as opposed to
DRAM, memory parts. These SRAM systems could sustained the maximum
bandwidth requirements of ~3.4 CPUs. Some of the earlier and slower
DRAM systems could only support 2.8 CPUs. So, the sustainable system
bandwidth was around 5 Gbyte/s.

Regards,
Charles Grassl
Cray Research, Inc.
cmg@cray.com
(612) 683-3531



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