Instructor: Kevin Skadron
Class meetings: Tu-Th 2:00-3:15 in OLS 011
Prerequisite: undergraduate computer architecture, covering at least pipelines and caches -- for UVA undergraduate students, this would be CS 3330 or ECE 4435 (old curriculum) or CS 3130 (new curriculum) or equivalent.
This course will explore the design of a variety of hardware accelerators, including current commercial architectures such as GPUs, TPUs, and FPGAs, and research proposals for potential new acceleration architectures, such as processing in memory, new machine-learning and data analytics, accelerators, and so on.
Assignments will consist of readings, group presentations of readings for class discussion, participation via comments written before class, scribe duties for the in-class discussion, and a research project. Group projects are encouraged. The project topic and plan for the project should offer the potential for publication.
Depending on course size, we may also have some small programming projects using these some of these accelerators.
The course grade will be based approximately on:
Honor code terms: All work must correctly attribute sources. All group work must represent equal effort from all partners--deviations from equal effort must be documented and should be discussed with me first. Projects must represent original work.
Last updated: 16 Oct. 2023