We use Berkeley’s Dwarf taxonomy to choose the applications to implement on different accelerators. Each dwarf represents a set of algorithms with similar computation and data movement. Our applications exhibit different characteristics and levels of parallelism and thus take advantage of the accelerators' parallel computing resources to different degrees. The level of programmer effort required to achieve satisfactory performance also varies widely across different applications.
Accelerators range from general purpose processors optimized for throughput over single-thread performance, through programmable, domain-specific processors optimized for characteristics of a particular application domain, to custom, application specific chips which are possibly implemented with reconfigurable hardware. Typical accelerators include GPUs, FPGAs, vector processors of IBM's Cell, DSPs, media processors and network processors,
- Graphic Processing Units
- Field Programmable Gate Arrays
- Media Processors
- Network Processing Units
- Other Accelerators