PMNet: In-Network Data Persistence (ISCA 2021)
End-to-end FPGA implementation of PMNet-enabled NIC and switch.GitHub
MultiPIM: A Detailed and Configurable Multi-Stack Processing-In-Memory Simulator (CAL 2021)
A simulator for Processing-in-Memory architectures.GitHub
PMFuzz: Test Case Generation for Persistent Memory Programs (ASPLOS 2021)
An open-sourced tool to fuzz persistent memory applications.GitHub
Artifact Available and Artifact Evaluated, Functional, Reproduced
Cross-Failure Bug Detection in Persistent Memory Programs (ASPLOS 2020)
An open-sourced tool to detect cross-failure race and cross-failure semantic bugs in persistent applications.GitHub
Artifact Available and Artifact Evaluated, Functional
PMTest: A Fast and Flexible Testing Framework for Persistent Memory Programs (ASPLOS 2019)
An open-sourced tool to detect crash consistency bugs in persistent applications developed in three modes: native using hardware primitives, on top of file systems, integrating user libraries. Currently, supports interface for Intel's PMFS, and PMDK.GitHub
Output Error Guarantee with Approximate Memory (WAX 2018)
An open-sourced static analysis tool to determine the worst-case error in the output of approximate applications when run on our approximate memory system.GitHub
SoftMC: Software Memory Controller (HPCA 2017)
An open-sourced FPGA-based memory controller design that can be used to develop tests for DDR3 SODIMMs using a C++ based API.GitHub
Toolchain for Automata-to-Routing (FCCM 2017)
An open-sourced toolchain for design-space exploration of spatial automata processing architectures.GitHub
Data Set on DRAM Latency Variation Study (SIGMETRICS 2016)
Data set gathers from real DRAM chips on timing parameter sensitivity.Link
Data Set on DRAM Failures with Variation in Timing Parameters (HPCA 2015)
Data set gathered from real DRAM chips on DRAM failure considering the variation in temperature and timing parameters.Link
Data Set on System-Level Detection of Intermittent Retention Failures (SIGMETRICS 2014)
Data set gathered from real DRAM chips on the characteristics of retention failures in DRAM.Link