Real-Time Systems: Architecture and Hardware

University of Virginia, Charlottesville


SpringNet is a distributed network of multiprocessor nodes. Each Spring node contains system (SP) and application (AP) processors, an I/O subsystem, and globally replicated memory (fiber optic ring). The SP insulates the application from the non-deterministic aspects of the environment and performs scheduling (in a planning mode) while the APs execute tasks guaranteed by the scheduler. The I/O subsystem handles non-critical I/O, slow I/O devices, and fast sensors. The fiber optic network is based on reflective memory and supports predictable real-time distributed communication. While a single ring has been implemented it is possible to expand the architecture as shown in the picture.

Spring Scheduling Co-processor

The Spring Scheduling Co-processor (SSCOP) is a custom VLSI chip that executes the spring scheduling algorithm. SSCOP has demonstrated a performance improvement of at least 3 orders of magnitude for the scheduling operation. Novel aspects incorporated into the design of this custom chip won first and second place awards in the 1993 chip design contest sponsored by the Massachusetts Microelectronics Center. The scheduling chip is general enough to run other algorithms besides the Spring scheduling algorithm.

Current Work

Current work includes investigating other multiprocessor and distributed system architectures including using ATM switches as the local network, studying the effect of RISC processors on the Spring system, examining caching issues, and pursuing hardware-software co-design (VLSI). Development of adaptive filters that control inputs to a real-time system has also been studied.