CS 6354: Graduate Computer Architecture

Meeting Time/Location: Mo/We 12:30pm-1:45pm @ Thornton D223
The goal of this course is to provide students with a modern view of computer architecture, and introduce them to the latest developments, challenges, issues, risks, and trends that drive the modern microprocessor industry. By taking this course, students will:
  • become conversant with fundamental computer architecture concepts,
  • be able to read and evaluate specs of modern architectures,
  • understand state-of-the-art design mechanisms and optimizations, and their implications on performance, power efficiency, and security, and
  • learn how to craft attacks that exploit security vulnerabilities in modern processors.
Required Textbook:
    Hennessy and Patterson, "Computer Architecture: A Quantitative Approach", Sixth Edition
Other (frequently referenced) online resources:


We will use Piazza as our class forum, and our primary mode of communication outside of class. All general inquiries must be made on Piazza. For group-specific questions or private questions, you can either email me or post a private question on Piazza.

Instructor: Teaching Assistants:


This is a graduate class -- we will be exploring advanced topics in computer architecture. Fourth year UVa undergraduate students interested to enroll should meet a minimum prerequisite requirement of an A- in the undergraduate computer architecture course CS 3330 or equivalent. Graduate students who focus on other complimentary CS disciplines are encouraged to enroll, but are expected to pick up relevant architecture background as we progress through the course. This course will satisfy breadth requirements under the "Computer Systems" category.

Useful resources to pick up architecture background:


The grading breakdown for this course is:

We will NOT use an absolute grading scale for this course. Your final letter grades will be assigned based on your overall performance, relative to the class average. In addition, you will receive an automatic level-up in your letter grade (e.g., A- to A) if you ace the final.


There will be 4 homework assignments (due every 2.5 weeks) and one SoK (Systematization of Knowledge) study (due Dec 1). Each homework assignment will involve 3-5 exercise problems from the textbook. Links to assignments:

Guidelines and Policies:


Date Topic Assignment
Aug 25 Introduction, Motivation, and Course Logistics HW0 and SoK topics out
Aug 30 No Class (DARPA meeting) -
Sep 1 Quantitative Analysis in Computer Architecture
H&P Chapter 1.9
Amdahl's Law in the Multicore Era, IEEE Computer, 2008
Sep 6 Labor Day -
Sep 8 Technology Scaling and Dark Silicon
Dark silicon and the end of multicore scaling, ISCA 2009
HW0 due, HW1 out
Sep 13 Instruction Set Architecture
Harnessing ISA Diversity: Design of a Heterogeneous-ISA Chip Multiprocessor, ISCA 2014
The Impact of ISAs on Performance, ISCA Workshop on Duplicating, Deconstructing, and Debunking, 2017
Sep 15 Pipelined Datapath and Control
H&P Appendix C
Sep 20 Pipelining: Data and Control Hazards
Chapter 3.1
Sep 22 Branch Prediction
H&P Chapter 3.3
A study of branch prediction strategies, ISCA 1981
Sep 27 Transient Execution Attacks
H&P Chapter 3.9
Spectre Attacks: Exploiting Speculative Execution, IEEE S&P 2019
HW1 due, HW2 out
Sep 29 Exposing and Exploiting ILP-1
Introducing the IA-64 Architecture, IEEE Micro 2000
The Design of the Microarchitecture of UltraSPARC-I, IEEE 1995
H&P Chapters 3.2 and 3.7
Oct 4 Exposing and Exploiting ILP-2
Introducing the IA-64 Architecture, IEEE Micro 2000
The Design of the Microarchitecture of UltraSPARC-I, IEEE 1995
H&P Chapters 3.4-3.5
Oct 6 OOO Processors with Speculative Execution
H&P Chapters 3.6 and 3.8
The MIPS R10000 Superscalar Microprocessor, IEEE Micro 1996
Oct 11 Fall Break -
Oct 13 Multithreading Architectures
Chapter 2 from Multithreading Architecture, Synthesis Lectures on Computer Architecture
Exploiting Choice: Instruction Fetch and Issue on an Implementable Simultaneous Multithreading Processor, ISCA 1996
Oct 18 Case Study: Intel Sandybridge, Haswell, and Skylake
Chapters 2.3, 2.2, 2.1, and 2.6 from Intel® 64 and IA-32 Architectures Optimization Reference Manual in that order.
HW2 due, HW3 out
Oct 20 Heterogeneous Chip Multiprocessors
Single-ISA Heterogeneous Multi-Core Architectures: The Potential for Processor Power Reduction, MICRO 2003
Composite-ISA Cores: Enabling Multi-ISA Heterogeneity Using a Single ISA, HPCA 2019
Intel Architecture Day 2021: Alder Lake, Golden Cove, and Gracemont Detailed, AnandTech 2021
Oct 25 Cache Design and Performance
A Case for Direct-Mapped Caches, IEEE Computer, 1988
Oct 27 Cache Optimizations
Improving Direct-Mapped Cache Performance by the Addition of a Small Fully-Associative Cache and Prefetch Buffers, ISCA 1990
Chapters 2 and 3 of A Primer on Hardware Prefetching, Synthesis Lectures on Computer Architecture
Nov 1 Side-Channel Attacks
Chapters 8.1-8.4 from Principles of Secure Processor Architecture Design
Covert and Side Channels due to Processor Architecture, ACSAC 2006
Last-Level Cache Side-Channel Attacks are Practical, IEEE S&P 2015
Nov 3 Side-Channel Defenses
Chapters 8.5-8.6 from Principles of Secure Processor Architecture Design
New cache designs for thwarting software cache-based side channel attacks, ISCA 2007
HW3 due
Nov 8 In-Class Hacking Workshop: Day-1
Important Links:
Starter Code
Computing Resources and SSH access
Nov 10 Intel FoMR PI Meeting -
Nov 15 In-Class Hacking Workshop: Day-2
Nov 17 Final Review -
Nov 22 No class (work on SoK paper) -
Nov 24 Thanksgiving Break -
Nov 29 Final Exam -
Dec 1 SoK presentations: Day-1 SoK paper due
Dec 6 SoK presentations: Day-2 -

Honor Code

I trust every student in this course to fully abide by the University's Honor Code and pledge to not commit academic fraud. You are allowed to discuss, collaborate, and brainstorm both within and outside your group. However, you're not allowed to plagiarize solutions/text from another student's assignment or from the internet. Cheating will be taken seriously and will be reported to the honor committee. All suspected honor violations will receive an immediate zero on that assignment regardless of any action taken by the Honor Committee.

    Please let me know if you have any questions regarding the course Honor policy. If you believe you may have committed an Honor Offense, you may wish to file a Conscientious Retraction by calling the Honor Offices at (434) 924-7602. For your retraction to be considered valid, it must, among other things, be filed with the Honor Committee before you are aware that the act in question has come under suspicion by anyone. More information can be found here. Your Honor representatives can be found at this link

    Learning Accommodations

    Students with disabilities or learning needs
    It is my goal to create a learning experience that is as accessible as possible. If you anticipate any issues related to the format, materials, or requirements of this course, please meet with me outside of class so we can explore potential options. Students with disabilities may also wish to work with the Student Disability Access Center to discuss a range of options to removing barriers in this course, including official accommodations. Please visit their website for information on this process and to apply for services online. If you have already been approved for accommodations through SDAC, please send me your accommodation letter and meet with me so we can develop an implementation plan together.

    Discrimination and power-based violence
    The University of Virginia is dedicated to providing a safe and equitable learning environment for all students. To that end, it is vital that you know two values that I and the University hold as critically important:
    1. Power-based personal violence will not be tolerated.
    2. Everyone has a responsibility to do their part to maintain a safe community on Grounds.
    If you or someone you know has been affected by power-based personal violence, more information can be found on the UVA Sexual Violence website that describes reporting options and resources available.
      As your professor and as a person, know that I care about you and your well-being and stand ready to provide support and resources as I can. As a faculty member, I am a responsible employee, which means that I am required by University policy and federal law to report what you tell me to the University's Title IX Coordinator. The Title IX Coordinator's job is to ensure that the reporting student receives the resources and support that they need, while also reviewing the information presented to determine whether further action is necessary to ensure survivor safety and the safety of the University community. If you wish to report something that you have seen, you can do so at the Just Report It portal. The worst possible situation would be for you or your friend to remain silent when there are so many here willing and able to help.

      Religious accommodations
      It is the University's long-standing policy and practice to reasonably accommodate students so that they do not experience an adverse academic consequence when sincerely held religious beliefs or observances conflict with academic requirements. Students who wish to request academic accommodation for a religious observance should submit their request in writing directly to me as far in advance as possible. Students who have questions or concerns about academic accommodations for religious observance or religious beliefs may contact the University’s Office for Equal Opportunity and Civil Rights (EOCR) at UVAEOCR@virginia.edu or (434) 924-3200.