CS 3330: Computer Architecture
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Showing material from Thu 20 Oct 2016
20161020-pipelab_sln.hcl
(1.58 KiB)
20161020am-lecture.mp4
(146.73 MiB)
20161020am-lecture.webm
(48.49 MiB)
20161020am_a-doges.png
(50.89 KiB)
20161020am_b-misprediction.png
(65.6 KiB)
20161020am_c-pipeline-debug-example.png
(69.56 KiB)
20161020am_d-locality.png
(99.01 KiB)
20161020am_e-ds-locality.png
(72.86 KiB)
20161020am_f-cache-locality.png
(122.85 KiB)
20161020am_g-place-replace.png
(145.71 KiB)
20161020am_h-hierarchy.png
(75.96 KiB)
20161020am_i-lines.png
(108.27 KiB)
20161020pm-lecture.mp4
(127.49 MiB)
20161020pm-lecture.webm
(45.76 MiB)
20161020pm_a-doges.png
(43.09 KiB)
20161020pm_b-misprediction.png
(74.08 KiB)
20161020pm_c-lab-bug-example.png
(146.45 KiB)
20161020pm_d-stalling-halt.png
(43.82 KiB)
20161020pm_e-locality.png
(57.57 KiB)
20161020pm_f-locality-of-DS.png
(69.97 KiB)
20161020pm_g-caches.png
(110.79 KiB)
20161020pm_h-conflict-capacity-array-set.png
(127.27 KiB)
20161020pm_i-lines.png
(75.49 KiB)
Copyright © 2016 by Luther Tychonievich and Charles Reiss. All rights reserved.