re: memory bandwidth

From: Robert Bell (Robert.Bell@mel.dit.csiro.au)
Date: Tue Oct 01 1991 - 21:00:52 CDT


John,
     Thanks for your comments.
     The C-90 has two pipes, and two load paths, one store path and one i/o
 path per processor. This gives a peak of 8000 Mbyte/s for the assignment,
 and 12000 Mbyte/s for the operations with two vector reads and one vector
 store.
     I would love to work up the benchmark I have to use multiple processors.
 It needs a lot of coordination, because I would really like to have control
 over the exact cycle that each processor hits each bank. I'll do some
 preliminary tests.
     I think the C-90 and Y-MP can maintain that performance for each CPU
 provided you don't hit bank conflicts. The machine I tested (in April)
 had only two processors, and the memory was by no means fully wired. There
 was talk of something like 256 banks, compared with 64 for our Y-MP.
     Nostalgia - our organization has had a Cyber 205, Cyber 76, CDC 3600,
 CDC 3200, etc, and was looking at the ETAs at the time CDC made a mess of it.
 It was sad. The 205 and ETA really knew how to provide fast memory transfers.
     Regards,
             Rob. Bell.



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