CS 6354: Graduate Computer Architecture

Meeting Time/Location: Mo/We 9:30-10:45am @ Rice 032
The goal of this course is to provide students with a modern view of computer architecture, and introduce them to the latest developments, challenges, issues, risks, and trends that drive the modern microprocessor industry. By taking this course, students will:
  • become conversant with fundamental computer architecture concepts,
  • be able to read and evaluate specs of modern architectures,
  • understand state-of-the-art design mechanisms and optimizations, and their implications on performance, power efficiency, and security, and
  • learn how to craft attacks that exploit security vulnerabilities in modern processors.
Required Textbook:
    Hennessy and Patterson, "Computer Architecture: A Quantitative Approach", Sixth Edition
Other (frequently referenced) online resources:

Contact

We will use Piazza as our class forum, and our primary mode of communication outside of class. All general inquiries must be made on Piazza. For group-specific questions or private questions, you can either email me or post a private question on Piazza.

Instructor: Teaching Assistant:

Prerequisites

This is a graduate class -- we will be exploring advanced topics in computer architecture. Fourth year UVa undergraduate students interested to enroll should meet a minimum prerequisite requirement of an A- in the undergraduate computer architecture course CS 3130, CS 4330, ECE 4435 or equivalent. Graduate students who focus on other complimentary CS disciplines are encouraged to enroll, but are expected to pick up relevant architecture background as we progress through the course. This course will satisfy breadth requirements under the "Computer Systems" category.

Useful resources to pick up architecture background:

Grading

The grading breakdown for this course is:

We will NOT use an absolute grading scale for this course. Your final letter grades will be assigned based on your overall performance, relative to the class average. In addition, you will receive an automatic level-up in your letter grade (e.g., A- to A) if you ace the final.

Assignments

There will be 3 homework assignments, an adversarial branch prediction championship, and a microbenchmarking project (due Dec 1). Each homework assignment will involve 3-5 exercise problems from the textbook. Links to assignments:

Guidelines and Policies:

Schedule

Date Topic Assignment
Aug 27 Introduction, Motivation, and Course Logistics HW0 out
Sep 1 Labor Day -
Sep 3 Quantitative Analysis in Computer Architecture
Reading:
H&P Chapter 1.9
Amdahl's Law in the Multicore Era, IEEE Computer, 2008
R.I.P. Geomean Speedup Use Equal-Work (Or Equal-Time) Harmonic Mean Speedup Instead, IEEE CAL, 2025
Microbenchmarking Project out
Sep 8 Technology Scaling and Dark Silicon
Reading:
Dark silicon and the end of multicore scaling, ISCA 2009
HW0 due
Sep 10 Instruction Set Architecture
Reading:
Harnessing ISA Diversity: Design of a Heterogeneous-ISA Chip Multiprocessor, ISCA 2014
The Impact of ISAs on Performance, ISCA Workshop on Duplicating, Deconstructing, and Debunking, 2017
-
Sep 15 Pipelined Datapath and Control
Reading:
H&P Appendix C
HW1 out
Sep 17 Pipelining: Data and Control Hazards
Reading:
Chapter 3.1
-
Sep 22 Branch Prediction
Reading:
H&P Chapter 3.3
A study of branch prediction strategies, ISCA 1981
Project Checkpoint-1 due
Sep 24 More Speculative Execution and Spectre
Reading:
H&P Chapter 3.9
Spectre Attacks: Exploiting Speculative Execution, IEEE S&P 2019
Adversarial Branch Prediction Championship begins
Sep 29 Exposing and Exploiting ILP-1
Reading:
Introducing the IA-64 Architecture, IEEE Micro 2000
The Design of the Microarchitecture of UltraSPARC-I, IEEE 1995
H&P Chapters 3.2 and 3.7
-
Oct 1 Exposing and Exploiting ILP-2
Reading:
Introducing the IA-64 Architecture, IEEE Micro 2000
The Design of the Microarchitecture of UltraSPARC-I, IEEE 1995
H&P Chapters 3.4-3.5
-
Oct 6 OOO Processors: Scoreboarding and Tomasulo's Algorithm
Reading:
H&P Chapters 3.6 and 3.8
-
Oct 8 OOO Processors: Explicit Register Renaming and Memory Disambiguation
Reading:
The MIPS R10000 Superscalar Microprocessor, IEEE Micro 1996
Memory Dependence Prediction using Store Sets, ISCA 1998
HW1 due
Oct 13 Fall Reading Day -
Oct 15 DARPA PI Meeting -
Oct 20 OOO Processors: Scheduling Logic
Reading:
Select-Free Instruction Scheduling Logic, MICRO 2001
Matrix Scheduler Reloaded, ISCA 2007
Adversarial Branch Prediction Championship ends
Oct 22 Multithreading Architectures
Reading:
Chapter 2 from Multithreading Architecture, Synthesis Lectures on Computer Architecture
Exploiting Choice: Instruction Fetch and Issue on an Implementable Simultaneous Multithreading Processor, ISCA 1996
HW2 out
Oct 27 Case Study: Intel Processor Microarchitectures
Reading:
The Case for a Single-Chip Multiprocessor, ASPLOS 1996
Chapters 2.1.1-2.1.3 from Intel® 64 and IA-32 Architectures Optimization Reference Manual (old)
-
Nov 3 Heterogeneous Chip Multiprocessors
Reading:
Single-ISA Heterogeneous Multi-Core Architectures: The Potential for Processor Power Reduction, MICRO 2003
Composite-ISA Cores: Enabling Multi-ISA Heterogeneity Using a Single ISA, HPCA 2019
Chapters 2.2-2.3 from Intel® 64 and IA-32 Architectures Optimization Reference Manual (new)
Project Checkpoint-2 due
Nov 5 Cache Design and Performance
Reading:
A Case for Direct-Mapped Caches, IEEE Computer, 1988
A case for two-way skewed-associative caches, ISCA 1993
-
Nov 10 Cache Optimizations
Reading:
Improving Direct-Mapped Cache Performance by the Addition of a Small Fully-Associative Cache and Prefetch Buffers, ISCA 1990
Chapters 2 and 3 of A Primer on Hardware Prefetching, Synthesis Lectures on Computer Architecture
-
Nov 12 Side-Channel Attacks
Reading:
Chapters 8.1-8.4 from Principles of Secure Processor Architecture Design
Covert and Side Channels due to Processor Architecture, ACSAC 2006
Last-Level Cache Side-Channel Attacks are Practical, IEEE S&P 2015
-
Nov 17 In-Class Hacking Workshop: Day-1
Important Links:
Starter Code
Computing Resources and SSH access
HW2 due
Nov 19 In-Class Hacking Workshop: Day-2 -
Nov 26 Thanksgiving Break -
Dec 1 Side-Channel Defenses
Reading:
Chapters 8.5-8.6 from Principles of Secure Processor Architecture Design
New cache designs for thwarting software cache-based side channel attacks, ISCA 2007
-
Dec 3 Final Review
Important Links:
Practice Problems
Solutions
-
Dec 8 Final Exam -
Dec 9 - Project Final Checkpoint due

Honor Code

I trust every student in this course to fully abide by the University's Honor Code and pledge to not commit academic fraud. You are allowed to discuss, collaborate, and brainstorm only with your partner, but not outside of your group. You're also allowed to use AI resources to work on your assignments, as long as you keep a detailed history of the prompts you used to help with your assignments. However, you're not allowed to plagiarize solutions/text from another student's assignment or from the internet. If you're using AI, the onus is on you to ensure that your submission is devoid of plagiarism. Cheating will be taken seriously and will be reported to the honor committee. All suspected honor violations will receive a failing grade (F) in the course regardless of any action taken by the Honor Committee.

    Please let me know if you have any questions regarding the course Honor policy. If you believe you may have committed an Honor Offense, you may wish to file a Conscientious Retraction by calling the Honor Offices at (434) 924-7602. For your retraction to be considered valid, it must, among other things, be filed with the Honor Committee before you are aware that the act in question has come under suspicion by anyone. More information can be found here. Your Honor representatives can be found at this link

    Learning Accommodations

    Students with disabilities or learning needs
    It is my goal to create a learning experience that is as accessible as possible. If you anticipate any issues related to the format, materials, or requirements of this course, please meet with me outside of class so we can explore potential options. Students with disabilities may also wish to work with the Student Disability Access Center (SDAC) to discuss a range of options to removing barriers in this course, including official accommodations. We are fortunate to have an SDAC advisor, Courtney MacMasters, physically located in Engineering. You may email her at cmacmasters@virginia.edu to schedule an appointment. For general questions please visit the SDAC website. If you have already been approved for accommodations through SDAC, please send me your accommodation letter and meet with me so we can develop an implementation plan together.

    Religious accommodations
    It is the University's long-standing policy and practice to reasonably accommodate students so that they do not experience an adverse academic consequence when sincerely held religious beliefs or observances conflict with academic requirements. Students who wish to request academic accommodation for a religious observance should submit their request in writing directly to me as far in advance as possible. Students who have questions or concerns about academic accommodations for religious observance or religious beliefs may contact the University’s Office for Equal Opportunity and Civil Rights (EOCR) at UVAEOCR@virginia.edu or (434) 924-3200.

    Harassment, Discrimination, and Interpersonal Violence
    The University of Virginia is dedicated to providing a safe and equitable learning environment for all students. If you or someone you know has been affected by power-based personal violence, more information can be found on the UVA Sexual Violence website that describes reporting options and resources available.
    The same resources and options for individuals who experience sexual misconduct are available for discrimination, harassment, and retaliation. UVA prohibits discrimination and harassment based on age, color, disability, family medical or genetic information, gender identity or expression, marital status, military status, national or ethnic origin, political affiliation, pregnancy (including childbirth and related conditions), race, religion, sex, sexual orientation, or veteran status. UVA policy also prohibits retaliation for reporting such behavior.
    If you witness or are aware of someone who has experienced prohibited conduct, you are encouraged to submit a report to Just Report It or contact EOCR, the office of Equal Opportunity and Civil Rights.
    If you would prefer to disclose such conduct to a confidential resource where what you share is not reported to the University, you can turn to Counseling & Psychological Services (“CAPS”) and Women’s Center Counseling Staff and Confidential Advocates (for students of all genders).
    As your professor and as a person, know that I care about you and your well-being and stand ready to provide support and resources as I can. As a faculty member, I am a responsible employee, which means that I am required by University policy and by federal law to report certain kinds of conduct that you report to me to the University's Title IX Coordinator. The Title IX Coordinator's job is to ensure that the reporting student receives the resources and support that they need, while also determining whether further action is necessary to ensure survivor safety and the safety of the University community.

    Absences, illnesses, and career development It is in the best interest of everyone in our community to keep the spread of infectious disease to a minimum. Please stay away from class if you are sick with a communicable illness. If this results in you missing a scheduled in-class activity such as the hacking workshop or an exam, please contact the course staff (the instructor and the TA) so we can schedule an alternate time for you to complete the missed work. In case of exams, please note that an alternate make-up exam will be provided, albeit with the same level of difficulty. As for class participation, you will still receive credit as long as you -- (1) do not miss more than 6 lectures, and (2) participate in at least half of the lectures you attend.

    Support for your career development
    Engaging in your career development is an important part of your student experience. For example, presenting at a research conference, attending an interview for a job or internship, or participating in an extern/shadowing experience are not only necessary steps on your path but are also invaluable lessons in and of themselves. I wish to encourage and support you in activities related to your career development. To that end, please notify me by email as far in advance as possible to arrange for appropriate accommodations.

    Community and Identity
    The Center for Connection (The Connect) is a dedicated student space within UVA Engineering that fosters academic success and personal growth. Through its programs and initiatives, The Connect helps students strengthen their engineering identity while providing resources to help them thrive during their studies and beyond. Our work centers on three key areas: student belonging and development, academic support, and community programming grounded in intentional, data-driven strategies. The Connect features an open study area, a flexible event space, and on-site staff who provide direct support and advising to students. It is part of the Office of Community, Opportunity, and Engagement.