Ashish Venkat

William Wulf Career Enhancement Assistant Professor
Department of Computer Science
University of Virginia
Office: Rice 312
Email: <lastname>@virginia.edu

My research interests lie broadly in Computer Architecture, Compilers, and Computer Security. My research explores novel and cross-disciplinary hardware and software techniques to design secure systems that offer robust exploit mitigations, while maintaining high levels of performance, energy efficiency, and programmability. I'm also interested in applying novel machine learning techniques to detect and mitigate security threats, model dynamic execution behavior, and provide efficient hardware/runtime support to enable the seamless adoption of highly heterogeneous platforms and emerging computing paradigms.

I am looking for motivated graduate students who are interested in the general area of Computer Architecture, Compilers, and Security.

News

2021

  • Sep 2021: Our paper on secure SMT architectures got accepted to USENIX Security 2022!
  • Jun 2021: Our proof-of-concept exploit code for our transient execution attack variants that exploit the micro-op cache is now available on Github.
  • Jun 2021: My students, Xida Ren, Logan Moody, and Lingxi Wu, put together excellent video presentations (links below) for the upcoming ISCA 2021 global virtual conference.
  • May 2021: Our work on the micro-op cache vulnerability has been covered widely by a number of global technology news and mainstream media outlets!
  • May 2021: Our group shines again at the 2021 Annual Computer Science Department Awards Ceremony! Congratulations to Xida Ren for winning the Graduate Service Award and to Joey Rudek for winning the Louis T. Rader Undergraduate Teaching Award!
  • Apr 2021: My students, Xida Ren and Logan Moody, gave an excellent talk at Intel labs on their recent ISCA work -- I See Dead µops, a novel transient execution attack that exploits Intel/AMD µop caches to leak secrets.
  • Mar 2021: Two papers accepted to ISCA 2021!
  • 2020

  • Nov 2020: Our Spectre mitigation paper on Context-Sensitive Fencing has been selected as a 2020 Top Pick in Hardware and Embedded Security, among hardware security conference papers that have appeared in the last 5 years (2014-2019) in leading architecture, security, and VLSI design conferences.
  • Sep 2020: My student, Layne Berry, presented our work on speculative superoptimization at SRC TECHCON 2020.
  • Aug 2020: Our research on Composite-ISA Cores has been covered by Coreteks, in the article "AMD Master Plan Pt. 2 -- Heterogeneous Revolution"!
  • Jul 2020: Received an NSF REU supplement award to our FoMR grant to support undergraduate research. Thanks to NSF for the generous support!
  • Jun 2020: I gave a virtual tech talk to Intel Labs and the FoMR community, on our work on superoptimization.
  • Jun 2020: My student, Rasool Sharifi, gave an excellent talk about our work on CHEx86 at ISCA 2020!
  • May 2020: Our research group shines at the 2020 Annual Computer Science Department Awards Ceremony! Congratulations to Layne Berry for winning two awards -- the Louis T. Rader Undergraduate Research Award and the Louis T. Rader Outstanding Undergraduate Student Education Award! Congratulations to Ishika Paul for winning the Outstanding Graduate Student Teaching Award!
  • Mar 2020: Paper on CHEx86, a microcode-based capability machine accepted to ISCA 2020!
  • Mar 2020: Paper on the Packet Chasing attack accepted to ISCA 2020!
  • Jan 2020: I'm serving as the Student Travel Grant Chair for HPCA 2020. I have been awarded an NSF grant to support student travel to the conference. Thanks to NSF for the generous support!
  • 2019

  • Dec 2019: Congratulations to my student, Layne Berry, who has been recognized nationally as one of CRA's Outstanding Undergraduate Researcher Award Honorable Mention recipients!
  • Dec 2019: I will be providing teaching mentorship to my student, Ishika Paul, under the Engineering Graduate Teaching Internship (GTI) program in Spring 2020.
  • Nov 2019: Presented our work on microcode customization at University of Cambridge, UK.
  • Oct 2019: Attending the NSF SaTC 2019 PI Meeting at Alexandria, VA.
  • Sep 2019: We expose yet another new vulnerability in Intel CPUs, in our paper on Packet Chasing -- verfied by Intel (CVE-2019-11184)!
  • Jun 2019: NSF/Intel FoMR Grant awarded: Speculative Superoptimization -- Boosting Performance via Speculation-Driven Dynamic Binary Optimization. Thanks to NSF and Intel for their generous support!
  • May 2019: Paper on ML-based scheduling accepted at SAMOS 2019!
  • Apr 2019: My first mentee, Kazem Taram, gave an amazing talk about our Spectre mitigation, Context-Sensitive Fencing, at ASPLOS 2019!
  • Mar 2019: Presented our work on Heterogeneous-ISA architectures at NC State.
  • Feb 2019: Composite-ISA Cores recognized as the best paper runner-up at HPCA 2019!
  • Feb 2019: Presented our work on Composite-ISA Cores at HPCA 2019.
  • Jan 2019: Our work on Microcode Customization has been recognized as an IEEE Micro Top Pick of all Computer Architecture conferences held in 2019!
  • 2018

  • Dec 2018: NSF SaTC CRII Grant awarded: Mitigating Microarchitectural Attacks via Microcode Customization!. Thanks to NSF for the generous support!
  • Nov 2018: Paper on Spectre mitigation accepted to ASPLOS 2019!
  • Nov 2018: Paper on Composite-ISA Cores accepted to HPCA 2019!
  • Nov 2018: DARPA SSITH subcontract awarded for our microcode customization work. Thanks to DARPA for their generous support!
  • Aug 2018: Presented our Spectre defense work at Intel Labs, Santa Clara.
  • Aug 2018: Joined the CS Department at UVA as Tenure-track Assistant Professor!
  • Students

    I am very fortunate to work with an outstanding group of graduate and undergraduate students.

    Graduate Students

    Rasool Sharifi
    Lingxi Wu (co-advised with Kevin Skadron)
    Xida Ren
    Logan Moody

    Undergraduate Students

    Muhammad Abdullah

    Alumni

    Layne Berry, BACS 2021, now pursuing Ph.D. at University of Texas, Austin
    Joey Rudek, BACS 2021, now pursuing Ph.D. at University of California, San Diego

    Papers

    I See Dead µops: Leaking Secrets via Intel/AMD Micro-Op Caches

    Xida Ren, Logan Moody, Mohammadkazem Taram, Matthew Jordan, Dean M. Tullsen, Ashish Venkat,
    In Proceedings of the 48th ACM/IEEE International Symposium on Computer Architecture (ISCA), June, 2021.
    [ Video | Proof-of-Concept Exploit Code ] [ Acceptance rate: 18% ]

    Sieve: Scalable In-situ DRAM-based Accelerator Designs for Massively Parallel k-mer Matching

    Lingxi Wu, Rasool Sharifi, Marzieh Lenjani, Kevin Skadron, Ashish Venkat,
    In Proceedings of the 48th ACM/IEEE International Symposium on Computer Architecture (ISCA), June, 2021.
    [ Video ] [ Acceptance rate: 18% ]

    CHEx86: Context-Sensitive Enforcement of Memory Safety via Microcode-Enabled Capabilities

    Rasool Sharifi and Ashish Venkat,
    In Proceedings of the 47th ACM/IEEE International Symposium on Computer Architecture (ISCA), June, 2020.
    [ Video ] [ Acceptance rate: 18% ]

    Packet Chasing: Spying on Network Packets over a Cache Side-Channel

    Mohammadkazem Taram, Ashish Venkat, Dean M. Tullsen,
    In Proceedings of the 47th ACM/IEEE International Symposium on Computer Architecture (ISCA), June, 2020.
    [ Video ] [ Acceptance rate: 18% ]

    Platform-Agnostic Learning-Based Scheduling

    Andreas Prodromou, Ashish Venkat, Dean M. Tullsen,
    In Proceedings of the 19th International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS), July, 2019.

    Context-Sensitive Decoding: On-Demand Microcode Customization for Security and Energy Management

    Mohammadkazem Taram, Ashish Venkat, Dean M. Tullsen,
    In IEEE Micro, Special Issue on the Top Picks from the Computer Architecture Conferences (IEEE Micro Top Picks), May, 2019. [ Acceptance rate: 9% ] Theme Article!

    Context-Sensitive Fencing: Securing Speculative Execution via Microcode Customization

    Mohammadkazem Taram, Ashish Venkat, Dean M. Tullsen,
    In Proceedings of the 24th ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), April, 2019.
    [ Slides ] [ Acceptance rate: 21% ]
    IEEE TCAD Top Pick for architecture/security/VLSI design conferences held between 2014-2019!

    Fast and Efficient Deployment of Security Defenses via Context Sensitive Decoding

    Mohammadkazem Taram, Dean M. Tullsen, Ashish Venkat, Houman Homayoun, Sai Manoj MD,
    In Proceedings of the 44th Government Microcircuit Applications and Critical Technology Conference (GOMACTech), March, 2019.

    Composite-ISA Cores: Enabling Multi-ISA Heterogeneity using a Single ISA

    Ashish Venkat, Harsha Basavaraj, Dean M. Tullsen,
    In Proceedings of the 25th IEEE International Symposium on High Performance Computer Architecture (HPCA), February, 2019.
    [ Slides ] [ Acceptance rate: 21% ]
    Best Paper Award Runner-Up!

    Deciphering Predictive Schedulers for Heterogeneous-ISA Architectures

    Andreas Prodromou, Ashish Venkat, Dean M. Tullsen,
    In Proceedings of the 10th International Workshop on Programming Models and Applications for Multicores and Manycores (PMAM), Feburary, 2019.

    Breaking the ISA Barrier in Modern Computing

    Ashish Venkat,
    Doctoral Dissertation, UC San Diego, July, 2018.

    Mobilizing the Micro-Ops: Exploiting Context-Sensitive Decoding for Security and Energy Efficiency

    Mohammadkazem Taram, Ashish Venkat, Dean M. Tullsen,
    In Proceedings of the 45th ACM/IEEE International Symposium on Computer Architecture (ISCA), June, 2018.
    [ Slides ] [ Acceptance rate: 17% ]
    IEEE Micro Top Pick for architecture conferences held in 2018!

    Reliability-Aware Data Placement for Heterogeneous Memory Architecture

    Manish Gupta, Vilas Sridharan, David Roberts, Andreas Prodromou, Ashish Venkat, Dean Tullsen, Rajesh Gupta,
    In Proceedings of the 24th IEEE International Symposium on High Performance Computer Architecture (HPCA), February, 2018.
    [ Slides ] [ Acceptance rate: 21% ]

    HIPStR: Heterogeneous-ISA Program State Relocation

    Ashish Venkat, Sriskanda Shamasunder, Hovav Shacham, Dean M. Tullsen,
    In Proceedings of the 21st ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), April, 2016.
    [ Slides | Poster ] [ Acceptance rate: 22% ]

    Binary Translator driven Program State Relocation

    Ashish Venkat, Arvind Krishnaswamy, Koichi Yamada, Rajan Palanivel,
    United States Patent Grant US009135435B2, September, 2015

    Harnessing ISA Diversity: Design of a Heterogeneous-ISA Chip Multiprocessor

    Ashish Venkat and Dean M. Tullsen,
    In Proceedings of the 41st ACM/IEEE International Symposium on Computer Architecture (ISCA), June, 2014.
    [ Slides ] [ Acceptance rate: 18% ]

    Execution Migration in a Heterogeneous-ISA Chip Multiprocessor

    Matthew DeVuyst, Ashish Venkat, Dean M. Tullsen,
    In Proceedings of the 17th ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), March, 2012.
    [ Slides ] [ Acceptance rate: 21% ]

    Teaching

    CS 6501: Hardware Security, Fall 2018, Fall 2020.
    CS 6354: Graduate Computer Architecture, Fall 2019, Fall 2021.
    CS 3330: Undergraduate Computer Architecture, Spring 2019, Spring 2020, Spring 2021.

    Bio

    Ashish Venkat is an Assistant Professor in the Department of Computer Science at the University of Virginia, where he joined after obtaining a Ph.D. from UC San Diego. His research interests are in computer architecture and compilers, especially in instruction set design, processor microarchitecture, binary translation, code generation, and their intersection with computer security and machine learning. His work has been published at top-tier venues such as ISCA, ASPLOS, and HPCA, and has received funding from NSF, DARPA, and Intel. His work has been recognized as an IEEE Micro Top Pick among all top-tier Computer Architecture Conference papers published in 2019, IEEE TCAD Top Pick among all Hardware and Embedded Security papers published in Computer Architecture, Computer Security, and VLSI CAD conferences held in the five years between 2014 and 2019, and as the runner-up of the HPCA Best Paper Award in 2019. His dissertation research has been successfully ported and transferred to the Cloud Platforms division of the IBM Haifa Research Lab.