Publications by Kevin Skadron and the LAVA Lab

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( Automata/RegEx processing | Multi-core/Multi-threaded/Heterogeneous/SIMD | Thermal | Power | Reliability | Graphics Architecture and GPGPU | MPEG | Control Theory | Branch Prediction & Instruction Fetch | Caching & Write Buffers | Performance Tradeoffs and Simulation Methodology  |  Misc. | Patents | Software )
(Organized by Publication Type | Google Scholar Page)
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  (Link to U.Va. Library for archive of  U.Va.-CS technical reports)

Automata Processing

Multi-core, Many-core, Multi-threading, Heterogeneous Architectures, and SIMD Organization




Graphics Architecture and GPU Computing


Control Theory

Branch Prediction and Instruction Fetch

Caching and Write Buffers

Performance Tradeoffs and Simulation Methodology



Software Releases

Kevin's home page
Last updated 17 July 2017

This work is currently supported by the National Science Foundation under grant no. CCF-1629450 (XPS) and CCF-1619127; by DARPA MTO (PERFECT program) under contract HR0011-13-C-0022; by C-FAR, one of six centers of STARnet, a Semiconductor Research Corporation program sponsored by MARCO and DARPA; the Virginia CIT CRCF program under grant MF16-032-IT; Xilinx; an ARCS Scholarship for Jack Wadden; and equipment donations and extended loans from Micron and Xilinx.  The U.Va. Center for Automata Processing (CAP) is supported in part by Micron.